| 1 | /* A simple I2C slave for returning monitor EDID data via DDC. |
| 2 | * |
| 3 | * Copyright (c) 2011 Linaro Limited |
| 4 | * Written by Peter Maydell |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | |
| 19 | #include "qemu/osdep.h" |
| 20 | #include "qemu/log.h" |
| 21 | #include "qemu/module.h" |
| 22 | #include "hw/i2c/i2c.h" |
| 23 | #include "hw/core/qdev-properties.h" |
| 24 | #include "migration/vmstate.h" |
| 25 | #include "hw/display/i2c-ddc.h" |
| 26 | |
| 27 | #ifndef DEBUG_I2CDDC |
| 28 | #define DEBUG_I2CDDC 0 |
| 29 | #endif |
| 30 | |
| 31 | #define DPRINTF(fmt, ...) do { \ |
| 32 | if (DEBUG_I2CDDC) { \ |
| 33 | qemu_log("i2c-ddc: " fmt , ## __VA_ARGS__); \ |
| 34 | } \ |
| 35 | } while (0) |
| 36 | |
| 37 | static void i2c_ddc_reset(DeviceState *ds) |
| 38 | { |
| 39 | I2CDDCState *s = I2CDDC(ds); |
| 40 | |
| 41 | s->firstbyte = false; |
| 42 | s->reg = 0; |
| 43 | } |
| 44 | |
| 45 | static int i2c_ddc_event(I2CSlave *i2c, enum i2c_event event) |
| 46 | { |
| 47 | I2CDDCState *s = I2CDDC(i2c); |
| 48 | |
| 49 | if (event == I2C_START_SEND) { |
| 50 | s->firstbyte = true; |
| 51 | } |
| 52 | |
| 53 | return 0; |
| 54 | } |
| 55 | |
| 56 | static uint8_t i2c_ddc_rx(I2CSlave *i2c) |
| 57 | { |
| 58 | I2CDDCState *s = I2CDDC(i2c); |
| 59 | |
| 60 | int value; |
| 61 | value = s->edid_blob[s->reg % sizeof(s->edid_blob)]; |
| 62 | s->reg++; |
| 63 | return value; |
| 64 | } |
| 65 | |
| 66 | static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data) |
| 67 | { |
| 68 | I2CDDCState *s = I2CDDC(i2c); |
| 69 | if (s->firstbyte) { |
| 70 | s->reg = data; |
| 71 | s->firstbyte = false; |
| 72 | DPRINTF("[EDID] Written new pointer: %u\n", data); |
| 73 | return 0; |
| 74 | } |
| 75 | |
| 76 | /* Ignore all writes */ |
| 77 | s->reg++; |
| 78 | return 0; |
| 79 | } |
| 80 | |
| 81 | static void i2c_ddc_init(Object *obj) |
| 82 | { |
| 83 | I2CDDCState *s = I2CDDC(obj); |
| 84 | |
| 85 | qemu_edid_generate(s->edid_blob, sizeof(s->edid_blob), &s->edid_info); |
| 86 | } |
| 87 | |
| 88 | static const VMStateDescription vmstate_i2c_ddc = { |
| 89 | .name = TYPE_I2CDDC, |
| 90 | .version_id = 1, |
| 91 | .fields = (const VMStateField[]) { |
| 92 | VMSTATE_BOOL(firstbyte, I2CDDCState), |
| 93 | VMSTATE_UINT8(reg, I2CDDCState), |
| 94 | VMSTATE_END_OF_LIST() |
| 95 | } |
| 96 | }; |
| 97 | |
| 98 | static const Property i2c_ddc_properties[] = { |
| 99 | DEFINE_EDID_PROPERTIES(I2CDDCState, edid_info), |
| 100 | }; |
| 101 | |
| 102 | static void i2c_ddc_class_init(ObjectClass *oc, const void *data) |
| 103 | { |
| 104 | DeviceClass *dc = DEVICE_CLASS(oc); |
| 105 | I2CSlaveClass *isc = I2C_SLAVE_CLASS(oc); |
| 106 | |
| 107 | device_class_set_legacy_reset(dc, i2c_ddc_reset); |
| 108 | dc->vmsd = &vmstate_i2c_ddc; |
| 109 | device_class_set_props(dc, i2c_ddc_properties); |
| 110 | isc->event = i2c_ddc_event; |
| 111 | isc->recv = i2c_ddc_rx; |
| 112 | isc->send = i2c_ddc_tx; |
| 113 | } |
| 114 | |
| 115 | static const TypeInfo i2c_ddc_info = { |
| 116 | .name = TYPE_I2CDDC, |
| 117 | .parent = TYPE_I2C_SLAVE, |
| 118 | .instance_size = sizeof(I2CDDCState), |
| 119 | .instance_init = i2c_ddc_init, |
| 120 | .class_init = i2c_ddc_class_init |
| 121 | }; |
| 122 | |
| 123 | static void ddc_register_devices(void) |
| 124 | { |
| 125 | type_register_static(&i2c_ddc_info); |
| 126 | } |
| 127 | |
| 128 | type_init(ddc_register_devices); |