| 1 | /* |
| 2 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 3 | * Copyright (C) 2024 IBM Corp. |
| 4 | * |
| 5 | * IBM Local bus where FSI slaves are connected |
| 6 | */ |
| 7 | |
| 8 | #include "qemu/osdep.h" |
| 9 | #include "qapi/error.h" |
| 10 | #include "hw/fsi/lbus.h" |
| 11 | #include "hw/core/qdev-properties.h" |
| 12 | #include "qemu/log.h" |
| 13 | #include "trace.h" |
| 14 | |
| 15 | #define TO_REG(offset) ((offset) >> 2) |
| 16 | |
| 17 | static void fsi_lbus_init(Object *o) |
| 18 | { |
| 19 | FSILBus *lbus = FSI_LBUS(o); |
| 20 | |
| 21 | memory_region_init(&lbus->mr, OBJECT(lbus), TYPE_FSI_LBUS, 1 * MiB); |
| 22 | } |
| 23 | |
| 24 | static const TypeInfo fsi_lbus_info = { |
| 25 | .name = TYPE_FSI_LBUS, |
| 26 | .parent = TYPE_BUS, |
| 27 | .instance_init = fsi_lbus_init, |
| 28 | .instance_size = sizeof(FSILBus), |
| 29 | }; |
| 30 | |
| 31 | static const TypeInfo fsi_lbus_device_type_info = { |
| 32 | .name = TYPE_FSI_LBUS_DEVICE, |
| 33 | .parent = TYPE_DEVICE, |
| 34 | .instance_size = sizeof(FSILBusDevice), |
| 35 | .abstract = true, |
| 36 | }; |
| 37 | |
| 38 | static uint64_t fsi_scratchpad_read(void *opaque, hwaddr addr, unsigned size) |
| 39 | { |
| 40 | FSIScratchPad *s = SCRATCHPAD(opaque); |
| 41 | int reg = TO_REG(addr); |
| 42 | |
| 43 | trace_fsi_scratchpad_read(addr, size); |
| 44 | |
| 45 | if (reg >= FSI_SCRATCHPAD_NR_REGS) { |
| 46 | qemu_log_mask(LOG_GUEST_ERROR, |
| 47 | "%s: Out-of-bounds read at offset 0x%" HWADDR_PRIx "\n", |
| 48 | __func__, addr); |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | return s->regs[reg]; |
| 53 | } |
| 54 | |
| 55 | static void fsi_scratchpad_write(void *opaque, hwaddr addr, uint64_t data, |
| 56 | unsigned size) |
| 57 | { |
| 58 | FSIScratchPad *s = SCRATCHPAD(opaque); |
| 59 | |
| 60 | trace_fsi_scratchpad_write(addr, size, data); |
| 61 | int reg = TO_REG(addr); |
| 62 | |
| 63 | if (reg >= FSI_SCRATCHPAD_NR_REGS) { |
| 64 | qemu_log_mask(LOG_GUEST_ERROR, |
| 65 | "%s: Out-of-bounds write at offset 0x%" HWADDR_PRIx "\n", |
| 66 | __func__, addr); |
| 67 | return; |
| 68 | } |
| 69 | |
| 70 | s->regs[reg] = data; |
| 71 | } |
| 72 | |
| 73 | static const struct MemoryRegionOps scratchpad_ops = { |
| 74 | .read = fsi_scratchpad_read, |
| 75 | .write = fsi_scratchpad_write, |
| 76 | .endianness = DEVICE_BIG_ENDIAN, |
| 77 | }; |
| 78 | |
| 79 | static void fsi_scratchpad_realize(DeviceState *dev, Error **errp) |
| 80 | { |
| 81 | FSILBusDevice *ldev = FSI_LBUS_DEVICE(dev); |
| 82 | |
| 83 | memory_region_init_io(&ldev->iomem, OBJECT(ldev), &scratchpad_ops, |
| 84 | ldev, TYPE_FSI_SCRATCHPAD, 0x400); |
| 85 | } |
| 86 | |
| 87 | static void fsi_scratchpad_reset(DeviceState *dev) |
| 88 | { |
| 89 | FSIScratchPad *s = SCRATCHPAD(dev); |
| 90 | |
| 91 | memset(s->regs, 0, sizeof(s->regs)); |
| 92 | } |
| 93 | |
| 94 | static void fsi_scratchpad_class_init(ObjectClass *klass, const void *data) |
| 95 | { |
| 96 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 97 | |
| 98 | dc->bus_type = TYPE_FSI_LBUS; |
| 99 | dc->realize = fsi_scratchpad_realize; |
| 100 | device_class_set_legacy_reset(dc, fsi_scratchpad_reset); |
| 101 | } |
| 102 | |
| 103 | static const TypeInfo fsi_scratchpad_info = { |
| 104 | .name = TYPE_FSI_SCRATCHPAD, |
| 105 | .parent = TYPE_FSI_LBUS_DEVICE, |
| 106 | .instance_size = sizeof(FSIScratchPad), |
| 107 | .class_init = fsi_scratchpad_class_init, |
| 108 | }; |
| 109 | |
| 110 | static void fsi_lbus_register_types(void) |
| 111 | { |
| 112 | type_register_static(&fsi_lbus_info); |
| 113 | type_register_static(&fsi_lbus_device_type_info); |
| 114 | type_register_static(&fsi_scratchpad_info); |
| 115 | } |
| 116 | |
| 117 | type_init(fsi_lbus_register_types); |