@samitouri / QOSamiQemu
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2
3 static const struct hexagon_machine_config v68n_1024 = {
4 .cfgbase = 0xde000000,
5 .l2tcm_size = 0x00000000,
6 .l2vic_base = 0xfc910000,
7 .l2vic_size = 0x00001000,
8 .csr_base = 0xfc900000,
9 .qtmr_region = 0xfc921000,
10 .cfgtable = {
11 .l2tcm_base = 0x0000d800,
12 .reserved0 = 0x00000000,
13 .subsystem_base = 0x0000fc90,
14 .etm_base = 0x0000d819,
15 .l2cfg_base = 0x0000d81a,
16 .reserved1 = 0x00000000,
17 .l1s0_base = 0x0000d840,
18 .axi2_lowaddr = 0x00003000,
19 .streamer_base = 0x0000d81c,
20 .reserved2 = 0x0000d81d,
21 .fastl2vic_base = 0x0000d81e,
22 .jtlb_size_entries = 0x00000080,
23 .coproc_present = 0x00000001,
24 .ext_contexts = 0x00000004,
25 .vtcm_base = 0x0000d840,
26 .vtcm_size_kb = 0x00001000,
27 .l2tag_size = 0x00000400,
28 .l2ecomem_size = 0x00000400,
29 .thread_enable_mask = 0x0000003f,
30 .eccreg_base = 0x0000d81f,
31 .l2line_size = 0x00000080,
32 .tiny_core = 0x00000000,
33 .l2itcm_size = 0x00000000,
34 .l2itcm_base = 0x0000d820,
35 .reserved3 = 0x00000000,
36 .dtm_present = 0x00000000,
37 .dma_version = 0x00000001,
38 .hvx_vec_log_length = 0x00000007,
39 .core_id = 0x00000000,
40 .core_count = 0x00000000,
41 .coproc2_reg0 = 0x00000040,
42 .coproc2_reg1 = 0x00000020,
43 .v2x_mode = 0x1f1f1f1f,
44 .coproc2_reg2 = 0x1f1f1f1f,
45 .coproc2_reg3 = 0x1f1f1f1f,
46 .coproc2_reg4 = 0x1f1f1f1f,
47 .coproc2_reg5 = 0x1f1f1f1f,
48 .coproc2_reg6 = 0x1f1f1f1f,
49 .coproc2_reg7 = 0x1f1f1f1f,
50 .acd_preset = 0x1f1f1f1f,
51 .mnd_preset = 0x1f1f1f1f,
52 .l1d_size_kb = 0x1f1f1f1f,
53 .l1i_size_kb = 0x1f1f1f1f,
54 .l1d_write_policy = 0x1f1f1f1f,
55 .vtcm_bank_width = 0x1f1f1f1f,
56 .reserved4 = 0x1f1f1f1f,
57 .reserved5 = 0x1f1f1f1f,
58 .reserved6 = 0x1f1f1f1f,
59 .coproc2_cvt_mpy_size = 0x1f1f1f1f,
60 .consistency_domain = 0x1f1f1f1f,
61 .capacity_domain = 0x1f1f1f1f,
62 .axi3_lowaddr = 0x1f1f1f1f,
63 },
64 };