| 1 | /* |
| 2 | * QEMU HPPA hardware system emulator. |
| 3 | * (C) Copyright 2018-2023 Helge Deller <deller@gmx.de> |
| 4 | * |
| 5 | * This work is licensed under the GNU GPL license version 2 or later. |
| 6 | */ |
| 7 | |
| 8 | #include "qemu/osdep.h" |
| 9 | #include "qemu/datadir.h" |
| 10 | #include "target/hppa/cpu.h" |
| 11 | #include "elf.h" |
| 12 | #include "hw/core/loader.h" |
| 13 | #include "qemu/error-report.h" |
| 14 | #include "exec/target_page.h" |
| 15 | #include "system/reset.h" |
| 16 | #include "system/system.h" |
| 17 | #include "system/qtest.h" |
| 18 | #include "system/runstate.h" |
| 19 | #include "hw/rtc/mc146818rtc.h" |
| 20 | #include "hw/timer/i8254.h" |
| 21 | #include "hw/char/serial-mm.h" |
| 22 | #include "hw/char/parallel.h" |
| 23 | #include "hw/intc/i8259.h" |
| 24 | #include "hw/input/lasips2.h" |
| 25 | #include "hw/net/lasi_82596.h" |
| 26 | #include "hw/core/nmi.h" |
| 27 | #include "hw/usb/usb.h" |
| 28 | #include "hw/pci/pci.h" |
| 29 | #include "hw/pci/pci_device.h" |
| 30 | #include "hw/pci-host/astro.h" |
| 31 | #include "hw/pci-host/dino.h" |
| 32 | #include "hw/misc/lasi.h" |
| 33 | #include "hw/scsi/ncr53c710.h" |
| 34 | #include "hw/scsi/lasi_ncr710.h" |
| 35 | #include "hppa_hardware.h" |
| 36 | #include "qemu/units.h" |
| 37 | #include "qapi/error.h" |
| 38 | #include "net/net.h" |
| 39 | #include "qemu/log.h" |
| 40 | |
| 41 | #define TYPE_HPPA_COMMON_MACHINE MACHINE_TYPE_NAME("hppa-common") |
| 42 | OBJECT_DECLARE_SIMPLE_TYPE(HppaMachineState, HPPA_COMMON_MACHINE) |
| 43 | |
| 44 | struct HppaMachineState { |
| 45 | MachineState parent_obj; |
| 46 | |
| 47 | DeviceState *lasi_dev; |
| 48 | uint64_t memsplit_addr; |
| 49 | }; |
| 50 | |
| 51 | #define MIN_SEABIOS_HPPA_VERSION 22 /* require at least this fw version */ |
| 52 | |
| 53 | #define HPA_POWER_BUTTON (FIRMWARE_END - 0x10) |
| 54 | static hwaddr soft_power_reg; |
| 55 | |
| 56 | static void hppa_powerdown_req(Notifier *n, void *opaque) |
| 57 | { |
| 58 | uint32_t val; |
| 59 | |
| 60 | val = ldl_be_phys(&address_space_memory, soft_power_reg); |
| 61 | if ((val >> 8) == 0) { |
| 62 | /* immediately shut down when under hardware control */ |
| 63 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
| 64 | return; |
| 65 | } |
| 66 | |
| 67 | /* clear bit 31 to indicate that the power switch was pressed. */ |
| 68 | val &= ~1; |
| 69 | stl_be_phys(&address_space_memory, soft_power_reg, val); |
| 70 | } |
| 71 | |
| 72 | static Notifier hppa_system_powerdown_notifier = { |
| 73 | .notify = hppa_powerdown_req |
| 74 | }; |
| 75 | |
| 76 | /* Fallback for unassigned PCI I/O operations. Avoids MCHK. */ |
| 77 | static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size) |
| 78 | { |
| 79 | return 0; |
| 80 | } |
| 81 | |
| 82 | static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size) |
| 83 | { |
| 84 | } |
| 85 | |
| 86 | static const MemoryRegionOps hppa_pci_ignore_ops = { |
| 87 | .read = ignore_read, |
| 88 | .write = ignore_write, |
| 89 | .endianness = DEVICE_BIG_ENDIAN, |
| 90 | .valid = { |
| 91 | .min_access_size = 1, |
| 92 | .max_access_size = 8, |
| 93 | }, |
| 94 | .impl = { |
| 95 | .min_access_size = 1, |
| 96 | .max_access_size = 8, |
| 97 | }, |
| 98 | }; |
| 99 | |
| 100 | static ISABus *hppa_isa_bus(hwaddr addr) |
| 101 | { |
| 102 | ISABus *isa_bus; |
| 103 | qemu_irq *isa_irqs; |
| 104 | MemoryRegion *isa_region; |
| 105 | |
| 106 | isa_region = g_new(MemoryRegion, 1); |
| 107 | memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops, |
| 108 | NULL, "isa-io", 0x800); |
| 109 | memory_region_add_subregion(get_system_memory(), addr, isa_region); |
| 110 | |
| 111 | isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region, |
| 112 | &error_abort); |
| 113 | isa_irqs = i8259_init(isa_bus, NULL); |
| 114 | isa_bus_register_input_irqs(isa_bus, isa_irqs); |
| 115 | |
| 116 | return isa_bus; |
| 117 | } |
| 118 | |
| 119 | /* |
| 120 | * Helper functions to emulate RTC clock and DebugOutputPort |
| 121 | */ |
| 122 | static time_t rtc_ref; |
| 123 | |
| 124 | static uint64_t io_cpu_read(void *opaque, hwaddr addr, unsigned size) |
| 125 | { |
| 126 | uint64_t val = 0; |
| 127 | |
| 128 | switch (addr) { |
| 129 | case 0: /* RTC clock */ |
| 130 | val = time(NULL); |
| 131 | val += rtc_ref; |
| 132 | break; |
| 133 | case 8: /* DebugOutputPort */ |
| 134 | return 0xe9; /* readback */ |
| 135 | } |
| 136 | return val; |
| 137 | } |
| 138 | |
| 139 | static void io_cpu_write(void *opaque, hwaddr addr, |
| 140 | uint64_t val, unsigned size) |
| 141 | { |
| 142 | unsigned char ch; |
| 143 | Chardev *debugout; |
| 144 | |
| 145 | switch (addr) { |
| 146 | case 0: /* RTC clock */ |
| 147 | rtc_ref = val - time(NULL); |
| 148 | break; |
| 149 | case 8: /* DebugOutputPort */ |
| 150 | ch = val; |
| 151 | debugout = serial_hd(0); |
| 152 | if (debugout) { |
| 153 | qemu_chr_fe_write_all(debugout->fe, &ch, 1); |
| 154 | } else { |
| 155 | fprintf(stderr, "%c", ch); |
| 156 | } |
| 157 | break; |
| 158 | } |
| 159 | } |
| 160 | |
| 161 | static const MemoryRegionOps hppa_io_helper_ops = { |
| 162 | .read = io_cpu_read, |
| 163 | .write = io_cpu_write, |
| 164 | .endianness = DEVICE_BIG_ENDIAN, |
| 165 | .valid = { |
| 166 | .min_access_size = 1, |
| 167 | .max_access_size = 8, |
| 168 | }, |
| 169 | .impl = { |
| 170 | .min_access_size = 1, |
| 171 | .max_access_size = 8, |
| 172 | }, |
| 173 | }; |
| 174 | |
| 175 | typedef uint64_t TranslateFn(void *opaque, uint64_t addr); |
| 176 | |
| 177 | static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr) |
| 178 | { |
| 179 | addr &= (0x10000000 - 1); |
| 180 | return addr; |
| 181 | } |
| 182 | |
| 183 | static HPPACPU *cpu[HPPA_MAX_CPUS]; |
| 184 | static uint64_t firmware_entry; |
| 185 | |
| 186 | static uint64_t translate_pa10(void *dummy, uint64_t addr) |
| 187 | { |
| 188 | const uint8_t pa_bits = hppa_phys_addr_bits(&cpu[0]->env); |
| 189 | return hppa_abs_to_phys_pa1x(pa_bits, addr); |
| 190 | } |
| 191 | |
| 192 | static uint64_t translate_pa20(void *dummy, uint64_t addr) |
| 193 | { |
| 194 | const uint8_t pa_bits = hppa_phys_addr_bits(&cpu[0]->env); |
| 195 | return hppa_abs_to_phys_pa2_w0(pa_bits, addr); |
| 196 | } |
| 197 | |
| 198 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
| 199 | Error **errp) |
| 200 | { |
| 201 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); |
| 202 | } |
| 203 | |
| 204 | static FWCfgState *create_fw_cfg(MachineState *ms, PCIBus *pci_bus, |
| 205 | hwaddr addr) |
| 206 | { |
| 207 | FWCfgState *fw_cfg; |
| 208 | uint64_t val; |
| 209 | const char qemu_version[] = QEMU_VERSION; |
| 210 | MachineClass *mc = MACHINE_GET_CLASS(ms); |
| 211 | int btlb_entries = HPPA_BTLB_ENTRIES(&cpu[0]->env); |
| 212 | struct HppaMachineState *hpm = HPPA_COMMON_MACHINE(ms); |
| 213 | int len; |
| 214 | |
| 215 | fw_cfg = fw_cfg_init_mem_nodma(addr, addr + 4, 1); |
| 216 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus); |
| 217 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS); |
| 218 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size); |
| 219 | |
| 220 | val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION); |
| 221 | fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", |
| 222 | g_memdup2(&val, sizeof(val)), sizeof(val)); |
| 223 | |
| 224 | val = cpu_to_le64(HPPA_TLB_ENTRIES - btlb_entries); |
| 225 | fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", |
| 226 | g_memdup2(&val, sizeof(val)), sizeof(val)); |
| 227 | |
| 228 | val = cpu_to_le64(btlb_entries); |
| 229 | fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", |
| 230 | g_memdup2(&val, sizeof(val)), sizeof(val)); |
| 231 | |
| 232 | len = strlen(mc->name) + 1; |
| 233 | fw_cfg_add_file(fw_cfg, "/etc/hppa/machine", |
| 234 | g_memdup2(mc->name, len), len); |
| 235 | |
| 236 | val = cpu_to_le64(hpm->memsplit_addr); |
| 237 | fw_cfg_add_file(fw_cfg, "/etc/hppa/memsplit-addr", |
| 238 | g_memdup2(&val, sizeof(val)), sizeof(val)); |
| 239 | |
| 240 | val = cpu_to_le64(soft_power_reg); |
| 241 | fw_cfg_add_file(fw_cfg, "/etc/hppa/power-button-addr", |
| 242 | g_memdup2(&val, sizeof(val)), sizeof(val)); |
| 243 | |
| 244 | val = cpu_to_le64(CPU_HPA + 16); |
| 245 | fw_cfg_add_file(fw_cfg, "/etc/hppa/rtc-addr", |
| 246 | g_memdup2(&val, sizeof(val)), sizeof(val)); |
| 247 | |
| 248 | val = cpu_to_le64(CPU_HPA + 24); |
| 249 | fw_cfg_add_file(fw_cfg, "/etc/hppa/DebugOutputPort", |
| 250 | g_memdup2(&val, sizeof(val)), sizeof(val)); |
| 251 | |
| 252 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_config.order[0]); |
| 253 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
| 254 | |
| 255 | fw_cfg_add_file(fw_cfg, "/etc/qemu-version", |
| 256 | g_memdup2(qemu_version, sizeof(qemu_version)), |
| 257 | sizeof(qemu_version)); |
| 258 | |
| 259 | pci_bus_add_fw_cfg_extra_pci_roots(fw_cfg, pci_bus, &error_abort); |
| 260 | |
| 261 | return fw_cfg; |
| 262 | } |
| 263 | |
| 264 | static LasiState *lasi_init(void) |
| 265 | { |
| 266 | DeviceState *dev; |
| 267 | |
| 268 | dev = qdev_new(TYPE_LASI_CHIP); |
| 269 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 270 | |
| 271 | return LASI_CHIP(dev); |
| 272 | } |
| 273 | |
| 274 | static DinoState *dino_init(MemoryRegion *addr_space) |
| 275 | { |
| 276 | DeviceState *dev; |
| 277 | |
| 278 | dev = qdev_new(TYPE_DINO_PCI_HOST_BRIDGE); |
| 279 | object_property_set_link(OBJECT(dev), "memory-as", OBJECT(addr_space), |
| 280 | &error_fatal); |
| 281 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 282 | |
| 283 | return DINO_PCI_HOST_BRIDGE(dev); |
| 284 | } |
| 285 | |
| 286 | /* |
| 287 | * Step 1: Create CPUs and Memory |
| 288 | */ |
| 289 | static TranslateFn *machine_HP_common_init_cpus(MachineState *machine) |
| 290 | { |
| 291 | MemoryRegion *addr_space = get_system_memory(); |
| 292 | unsigned int smp_cpus = machine->smp.cpus; |
| 293 | TranslateFn *translate; |
| 294 | MemoryRegion *cpu_region; |
| 295 | uint64_t ram_max; |
| 296 | struct HppaMachineState *hpm; |
| 297 | hwaddr splitaddr; |
| 298 | |
| 299 | /* Create CPUs. */ |
| 300 | for (unsigned int i = 0; i < smp_cpus; i++) { |
| 301 | cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type)); |
| 302 | } |
| 303 | |
| 304 | /* Initialize memory */ |
| 305 | if (hppa_is_pa20(&cpu[0]->env)) { |
| 306 | translate = translate_pa20; |
| 307 | ram_max = 256 * GiB; /* like HP rp8440 */ |
| 308 | } else { |
| 309 | translate = translate_pa10; |
| 310 | ram_max = FIRMWARE_START; /* 3.75 GB (32-bit CPU) */ |
| 311 | } |
| 312 | |
| 313 | soft_power_reg = translate(NULL, HPA_POWER_BUTTON); |
| 314 | |
| 315 | for (unsigned int i = 0; i < smp_cpus; i++) { |
| 316 | g_autofree char *name = g_strdup_printf("cpu%u-io-eir", i); |
| 317 | g_autofree char *cflush_name = NULL; |
| 318 | MemoryRegion *cflush; |
| 319 | |
| 320 | cpu_region = g_new(MemoryRegion, 1); |
| 321 | memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops, |
| 322 | cpu[i], name, 4); |
| 323 | memory_region_add_subregion(addr_space, |
| 324 | translate(NULL, CPU_HPA + i * 0x1000), |
| 325 | cpu_region); |
| 326 | |
| 327 | if (!hppa_is_pa20(&cpu[0]->env)) { |
| 328 | continue; |
| 329 | } |
| 330 | |
| 331 | /* |
| 332 | * HP-UX 11 64-bit reads a word from address CPU_HPA + 0x500 |
| 333 | * while flushing the cache of a T600, which was the first |
| 334 | * server with a 64-bit PA-RISC 2.0 CPU. |
| 335 | * We return 0, since the value isn't used anyway. |
| 336 | */ |
| 337 | cflush_name = g_strdup_printf("cpu%u-T600-cacheflush", i); |
| 338 | cflush = g_new(MemoryRegion, 1); |
| 339 | memory_region_init_io(cflush, NULL, &hppa_pci_ignore_ops, |
| 340 | NULL, cflush_name, 4); |
| 341 | memory_region_add_subregion(addr_space, |
| 342 | translate(NULL, CPU_HPA + i * 0x1000 + 0x500), |
| 343 | cflush); |
| 344 | } |
| 345 | |
| 346 | /* RTC and DebugOutputPort on CPU #0 */ |
| 347 | cpu_region = g_new(MemoryRegion, 1); |
| 348 | memory_region_init_io(cpu_region, OBJECT(cpu[0]), &hppa_io_helper_ops, |
| 349 | cpu[0], "cpu0-io-rtc", 2 * sizeof(uint64_t)); |
| 350 | memory_region_add_subregion(addr_space, translate(NULL, CPU_HPA + 16), |
| 351 | cpu_region); |
| 352 | |
| 353 | /* Main memory region. */ |
| 354 | if (machine->ram_size > ram_max) { |
| 355 | info_report("Max RAM size limited to %" PRIu64 " MB", ram_max / MiB); |
| 356 | machine->ram_size = ram_max; |
| 357 | } |
| 358 | |
| 359 | hpm = HPPA_COMMON_MACHINE(machine); |
| 360 | if (!hpm->memsplit_addr) { |
| 361 | /* non-contiguous: Memory above 3.75 GB is mapped at RAM_MAP_HIGH */ |
| 362 | hpm->memsplit_addr = FIRMWARE_START; |
| 363 | } |
| 364 | splitaddr = hpm->memsplit_addr; |
| 365 | |
| 366 | MemoryRegion *mem_region; |
| 367 | mem_region = g_new(MemoryRegion, 1); |
| 368 | memory_region_init_alias(&mem_region[0], &addr_space->parent_obj, |
| 369 | "memory0", machine->ram, 0, splitaddr); |
| 370 | memory_region_add_subregion_overlap(addr_space, 0, &mem_region[0], -1); |
| 371 | if (hppa_is_pa20(&cpu[0]->env)) { |
| 372 | if (machine->ram_size > 4 * GiB) { |
| 373 | mem_region = g_new(MemoryRegion, 1); |
| 374 | memory_region_init_alias(&mem_region[0], &addr_space->parent_obj, |
| 375 | "memory1", machine->ram, 4 * GiB, |
| 376 | machine->ram_size - 4 * GiB); |
| 377 | memory_region_add_subregion_overlap(addr_space, RAM_MAP_HIGH1, |
| 378 | &mem_region[0], -1); |
| 379 | } |
| 380 | if (machine->ram_size > splitaddr) { |
| 381 | mem_region = g_new(MemoryRegion, 1); |
| 382 | memory_region_init_alias(&mem_region[0], &addr_space->parent_obj, |
| 383 | "memory2", machine->ram, splitaddr, |
| 384 | 4 * GiB - splitaddr); |
| 385 | memory_region_add_subregion_overlap(addr_space, RAM_MAP_HIGH2, |
| 386 | &mem_region[0], -1); |
| 387 | } |
| 388 | } |
| 389 | |
| 390 | return translate; |
| 391 | } |
| 392 | |
| 393 | /* |
| 394 | * Last creation step: Add NICs, graphics & load firmware |
| 395 | */ |
| 396 | static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus, |
| 397 | TranslateFn *translate) |
| 398 | { |
| 399 | const char *kernel_filename = machine->kernel_filename; |
| 400 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
| 401 | HppaMachineState *hpm = HPPA_COMMON_MACHINE(machine); |
| 402 | DeviceState *dev, *lasi_dev; |
| 403 | PCIDevice *pci_dev; |
| 404 | long size; |
| 405 | uint64_t kernel_entry = 0; |
| 406 | MemoryRegion *addr_space = get_system_memory(); |
| 407 | MemoryRegion *rom_region; |
| 408 | SysBusDevice *s; |
| 409 | |
| 410 | /* Graphics setup. */ |
| 411 | lasi_dev = hpm->lasi_dev; |
| 412 | if (lasi_dev && machine->enable_graphics && |
| 413 | vga_interface_type != VGA_NONE) { |
| 414 | dev = qdev_new("artist"); |
| 415 | s = SYS_BUS_DEVICE(dev); |
| 416 | bool disabled = object_property_get_bool(OBJECT(dev), "disable", NULL); |
| 417 | if (!disabled) { |
| 418 | sysbus_realize_and_unref(s, &error_fatal); |
| 419 | vga_interface_created = true; |
| 420 | sysbus_mmio_map(s, 0, translate(NULL, LASI_GFX_HPA)); |
| 421 | sysbus_mmio_map(s, 1, translate(NULL, ARTIST_FB_ADDR)); |
| 422 | } |
| 423 | } |
| 424 | |
| 425 | if (pci_bus) { |
| 426 | pci_init_nic_devices(pci_bus, mc->default_nic); |
| 427 | } |
| 428 | |
| 429 | if (pci_bus && hppa_is_pa20(&cpu[0]->env)) { |
| 430 | /* BMC board: HP Diva GSP PCI card */ |
| 431 | pci_dev = pci_new_multifunction(PCI_DEVFN(2, 0), "diva-gsp"); |
| 432 | if (!lasi_dev) { |
| 433 | /* bind default keyboard/serial to Diva card */ |
| 434 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev1", serial_hd(0)); |
| 435 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev2", serial_hd(1)); |
| 436 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev3", serial_hd(2)); |
| 437 | qdev_prop_set_chr(DEVICE(pci_dev), "chardev4", serial_hd(3)); |
| 438 | } |
| 439 | pci_realize_and_unref(pci_dev, pci_bus, &error_fatal); |
| 440 | } |
| 441 | |
| 442 | /* create USB OHCI controller for USB keyboard & mouse on Astro machines */ |
| 443 | if (!lasi_dev && machine->enable_graphics && defaults_enabled()) { |
| 444 | USBBus *usb_bus; |
| 445 | |
| 446 | pci_create_simple(pci_bus, -1, "pci-ohci"); |
| 447 | usb_bus = USB_BUS(object_resolve_type_unambiguous(TYPE_USB_BUS, |
| 448 | &error_abort)); |
| 449 | usb_create_simple(usb_bus, "usb-kbd"); |
| 450 | usb_create_simple(usb_bus, "usb-mouse"); |
| 451 | } |
| 452 | |
| 453 | /* register power switch emulation */ |
| 454 | qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier); |
| 455 | |
| 456 | /* fw_cfg configuration interface */ |
| 457 | create_fw_cfg(machine, pci_bus, translate(NULL, FW_CFG_IO_BASE)); |
| 458 | |
| 459 | /* Load firmware. Given that this is not "real" firmware, |
| 460 | but one explicitly written for the emulation, we might as |
| 461 | well load it directly from an ELF image. Load the 64-bit |
| 462 | firmware on 64-bit machines by default if not specified |
| 463 | on command line. */ |
| 464 | if (!qtest_enabled()) { |
| 465 | const char *firmware = machine->firmware; |
| 466 | uint64_t firmware_low, firmware_high; |
| 467 | char *firmware_filename; |
| 468 | |
| 469 | if (!firmware) { |
| 470 | firmware = lasi_dev ? "hppa-firmware.img" : "hppa-firmware64.img"; |
| 471 | } |
| 472 | firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware); |
| 473 | if (firmware_filename == NULL) { |
| 474 | error_report("no firmware provided"); |
| 475 | exit(1); |
| 476 | } |
| 477 | |
| 478 | size = load_elf(firmware_filename, NULL, translate, NULL, |
| 479 | &firmware_entry, &firmware_low, &firmware_high, NULL, |
| 480 | ELFDATA2MSB, EM_PARISC, 0, 0); |
| 481 | |
| 482 | if (size < 0) { |
| 483 | error_report("could not load firmware '%s'", firmware_filename); |
| 484 | exit(1); |
| 485 | } |
| 486 | qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64 |
| 487 | "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n", |
| 488 | firmware_low, firmware_high, firmware_entry); |
| 489 | if (firmware_low < translate(NULL, FIRMWARE_START) || |
| 490 | firmware_high >= translate(NULL, FIRMWARE_END)) { |
| 491 | error_report("Firmware overlaps with memory or IO space"); |
| 492 | exit(1); |
| 493 | } |
| 494 | g_free(firmware_filename); |
| 495 | } |
| 496 | |
| 497 | rom_region = g_new(MemoryRegion, 1); |
| 498 | memory_region_init_ram(rom_region, NULL, "firmware", |
| 499 | (FIRMWARE_END - FIRMWARE_START), &error_fatal); |
| 500 | memory_region_add_subregion(addr_space, |
| 501 | translate(NULL, FIRMWARE_START), rom_region); |
| 502 | |
| 503 | /* Load kernel */ |
| 504 | if (kernel_filename) { |
| 505 | const char *kernel_cmdline = machine->kernel_cmdline; |
| 506 | const char *initrd_filename = machine->initrd_filename; |
| 507 | uint64_t kernel_low, kernel_high; |
| 508 | |
| 509 | size = load_elf(kernel_filename, NULL, linux_kernel_virt_to_phys, |
| 510 | NULL, &kernel_entry, &kernel_low, &kernel_high, NULL, |
| 511 | ELFDATA2MSB, EM_PARISC, 0, 0); |
| 512 | |
| 513 | kernel_entry = linux_kernel_virt_to_phys(NULL, kernel_entry); |
| 514 | |
| 515 | if (size < 0) { |
| 516 | error_report("could not load kernel '%s'", kernel_filename); |
| 517 | exit(1); |
| 518 | } |
| 519 | qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64 |
| 520 | "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 |
| 521 | ", size %" PRIu64 " kB\n", |
| 522 | kernel_low, kernel_high, kernel_entry, size / KiB); |
| 523 | |
| 524 | if (kernel_cmdline) { |
| 525 | cpu[0]->env.cmdline_or_bootorder = 0x4000; |
| 526 | pstrcpy_targphys("cmdline", cpu[0]->env.cmdline_or_bootorder, |
| 527 | TARGET_PAGE_SIZE, kernel_cmdline); |
| 528 | } |
| 529 | |
| 530 | if (initrd_filename) { |
| 531 | ram_addr_t initrd_base; |
| 532 | int64_t initrd_size; |
| 533 | |
| 534 | initrd_size = get_image_size(initrd_filename, NULL); |
| 535 | if (initrd_size < 0) { |
| 536 | error_report("could not load initial ram disk '%s'", |
| 537 | initrd_filename); |
| 538 | exit(1); |
| 539 | } |
| 540 | |
| 541 | /* Load the initrd image high in memory. |
| 542 | Mirror the algorithm used by palo: |
| 543 | (1) Due to sign-extension problems and PDC, |
| 544 | put the initrd no higher than 1G. |
| 545 | (2) Reserve 64k for stack. */ |
| 546 | initrd_base = MIN(machine->ram_size, 1 * GiB); |
| 547 | initrd_base = initrd_base - 64 * KiB; |
| 548 | initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK; |
| 549 | |
| 550 | if (initrd_base < kernel_high) { |
| 551 | error_report("kernel and initial ram disk too large!"); |
| 552 | exit(1); |
| 553 | } |
| 554 | |
| 555 | load_image_targphys(initrd_filename, initrd_base, initrd_size, |
| 556 | &error_fatal); |
| 557 | cpu[0]->env.initrd_base = initrd_base; |
| 558 | cpu[0]->env.initrd_end = initrd_base + initrd_size; |
| 559 | } |
| 560 | } |
| 561 | |
| 562 | if (!kernel_entry) { |
| 563 | /* When booting via firmware, tell firmware if we want interactive |
| 564 | * mode (kernel_entry=1), and to boot from CD (cmdline_or_bootorder='d') |
| 565 | * or hard disc (cmdline_or_bootorder='c'). |
| 566 | */ |
| 567 | kernel_entry = machine->boot_config.has_menu ? machine->boot_config.menu : 0; |
| 568 | cpu[0]->env.cmdline_or_bootorder = machine->boot_config.order[0]; |
| 569 | } |
| 570 | |
| 571 | /* Keep initial kernel_entry for first boot */ |
| 572 | cpu[0]->env.kernel_entry = kernel_entry; |
| 573 | } |
| 574 | |
| 575 | /* |
| 576 | * Create HP 715/64 workstation |
| 577 | */ |
| 578 | static void machine_HP_715_init(MachineState *machine) |
| 579 | { |
| 580 | HppaMachineState *hpm = HPPA_COMMON_MACHINE(machine); |
| 581 | DeviceState *dev, *lasi_dev; |
| 582 | MemoryRegion *addr_space = get_system_memory(); |
| 583 | TranslateFn *translate; |
| 584 | ISABus *isa_bus; |
| 585 | |
| 586 | /* Create CPUs and RAM. */ |
| 587 | translate = machine_HP_common_init_cpus(machine); |
| 588 | |
| 589 | if (hppa_is_pa20(&cpu[0]->env)) { |
| 590 | error_report("The HP 715/64 workstation requires a 32-bit " |
| 591 | "CPU. Use '-machine 715' instead."); |
| 592 | exit(1); |
| 593 | } |
| 594 | |
| 595 | /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ |
| 596 | isa_bus = hppa_isa_bus(translate(NULL, IDE_HPA)); |
| 597 | assert(isa_bus); |
| 598 | |
| 599 | /* Init Lasi chip */ |
| 600 | lasi_dev = DEVICE(lasi_init()); |
| 601 | hpm->lasi_dev = lasi_dev; |
| 602 | memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA_715), |
| 603 | sysbus_mmio_get_region( |
| 604 | SYS_BUS_DEVICE(lasi_dev), 0)); |
| 605 | |
| 606 | /* Serial ports: Lasi use a 7.272727 MHz clock. */ |
| 607 | serial_mm_init(addr_space, translate(NULL, LASI_HPA_715 + LASI_UART + 0x800), 0, |
| 608 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, |
| 609 | serial_hd(0), DEVICE_BIG_ENDIAN); |
| 610 | |
| 611 | /* Parallel port */ |
| 612 | parallel_mm_init(addr_space, translate(NULL, LASI_HPA_715 + LASI_LPT + 0x800), 0, |
| 613 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_LPT_HPA), |
| 614 | parallel_hds[0]); |
| 615 | |
| 616 | /* PS/2 Keyboard/Mouse */ |
| 617 | dev = qdev_new(TYPE_LASIPS2); |
| 618 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 619 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, |
| 620 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); |
| 621 | memory_region_add_subregion(addr_space, |
| 622 | translate(NULL, LASI_HPA_715 + LASI_PS2), |
| 623 | sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), |
| 624 | 0)); |
| 625 | memory_region_add_subregion(addr_space, |
| 626 | translate(NULL, LASI_HPA_715 + LASI_PS2 + 0x100), |
| 627 | sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), |
| 628 | 1)); |
| 629 | /* SCSI disk setup. */ |
| 630 | if (drive_get_max_bus(IF_SCSI) >= 0) { |
| 631 | dev = lasi_ncr710_init(addr_space, |
| 632 | translate(NULL, LASI_HPA_715 + 0x6000), |
| 633 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_SCSI_HPA)); |
| 634 | assert(dev); |
| 635 | lasi_ncr710_handle_legacy_cmdline(dev); |
| 636 | } |
| 637 | |
| 638 | /* LASI i82596 network */ |
| 639 | dev = qemu_create_nic_device(TYPE_LASI_82596, true, "lasi"); |
| 640 | if (dev) { |
| 641 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 642 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, |
| 643 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_LAN_HPA)); |
| 644 | memory_region_add_subregion(addr_space, |
| 645 | translate(NULL, LASI_HPA_715 + LASI_LAN), |
| 646 | sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); |
| 647 | } |
| 648 | |
| 649 | /* Add NICs, graphics & load firmware */ |
| 650 | machine_HP_common_init_tail(machine, NULL, translate); |
| 651 | } |
| 652 | |
| 653 | /* |
| 654 | * Create HP B160L workstation |
| 655 | */ |
| 656 | static void machine_HP_B160L_init(MachineState *machine) |
| 657 | { |
| 658 | HppaMachineState *hpm = HPPA_COMMON_MACHINE(machine); |
| 659 | DeviceState *dev, *dino_dev, *lasi_dev; |
| 660 | MemoryRegion *addr_space = get_system_memory(); |
| 661 | TranslateFn *translate; |
| 662 | ISABus *isa_bus; |
| 663 | PCIBus *pci_bus; |
| 664 | |
| 665 | /* Create CPUs and RAM. */ |
| 666 | translate = machine_HP_common_init_cpus(machine); |
| 667 | |
| 668 | if (hppa_is_pa20(&cpu[0]->env)) { |
| 669 | error_report("The HP B160L workstation requires a 32-bit " |
| 670 | "CPU. Use '-machine C3700' instead."); |
| 671 | exit(1); |
| 672 | } |
| 673 | |
| 674 | /* Init Lasi chip */ |
| 675 | lasi_dev = DEVICE(lasi_init()); |
| 676 | hpm->lasi_dev = lasi_dev; |
| 677 | memory_region_add_subregion(addr_space, translate(NULL, LASI_HPA), |
| 678 | sysbus_mmio_get_region( |
| 679 | SYS_BUS_DEVICE(lasi_dev), 0)); |
| 680 | |
| 681 | /* Init Dino (PCI host bus chip). */ |
| 682 | dino_dev = DEVICE(dino_init(addr_space)); |
| 683 | memory_region_add_subregion(addr_space, translate(NULL, DINO_HPA), |
| 684 | sysbus_mmio_get_region( |
| 685 | SYS_BUS_DEVICE(dino_dev), 0)); |
| 686 | pci_bus = PCI_BUS(qdev_get_child_bus(dino_dev, "pci")); |
| 687 | assert(pci_bus); |
| 688 | |
| 689 | /* Create ISA bus, needed for PS/2 kbd/mouse port emulation */ |
| 690 | isa_bus = hppa_isa_bus(translate(NULL, IDE_HPA)); |
| 691 | assert(isa_bus); |
| 692 | |
| 693 | /* Serial ports: Lasi and Dino use a 7.272727 MHz clock. */ |
| 694 | serial_mm_init(addr_space, translate(NULL, LASI_HPA + LASI_UART + 0x800), 0, |
| 695 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_UART_HPA), 7272727 / 16, |
| 696 | serial_hd(0), DEVICE_BIG_ENDIAN); |
| 697 | |
| 698 | serial_mm_init(addr_space, translate(NULL, DINO_UART_HPA + 0x800), 0, |
| 699 | qdev_get_gpio_in(dino_dev, DINO_IRQ_RS232INT), 7272727 / 16, |
| 700 | serial_hd(1), DEVICE_BIG_ENDIAN); |
| 701 | |
| 702 | /* Parallel port */ |
| 703 | parallel_mm_init(addr_space, |
| 704 | translate(NULL, LASI_HPA + LASI_LPT + 0x800), 0, |
| 705 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_LPT_HPA), |
| 706 | parallel_hds[0]); |
| 707 | |
| 708 | /* PS/2 Keyboard/Mouse */ |
| 709 | dev = qdev_new(TYPE_LASIPS2); |
| 710 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 711 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, |
| 712 | qdev_get_gpio_in(lasi_dev, LASI_IRQ_PS2KBD_HPA)); |
| 713 | memory_region_add_subregion(addr_space, |
| 714 | translate(NULL, LASI_HPA + LASI_PS2), |
| 715 | sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), |
| 716 | 0)); |
| 717 | memory_region_add_subregion(addr_space, |
| 718 | translate(NULL, LASI_HPA + LASI_PS2 + 0x100), |
| 719 | sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), |
| 720 | 1)); |
| 721 | |
| 722 | /* SCSI disk setup. */ |
| 723 | if (drive_get_max_bus(IF_SCSI) >= 0) { |
| 724 | dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); |
| 725 | lsi53c8xx_handle_legacy_cmdline(dev); |
| 726 | } |
| 727 | |
| 728 | /* Add NICs, graphics & load firmware */ |
| 729 | machine_HP_common_init_tail(machine, pci_bus, translate); |
| 730 | } |
| 731 | |
| 732 | static AstroState *astro_init(void) |
| 733 | { |
| 734 | DeviceState *dev; |
| 735 | |
| 736 | dev = qdev_new(TYPE_ASTRO_CHIP); |
| 737 | object_property_set_int(OBJECT(dev), "phys-addr-bits", |
| 738 | hppa_phys_addr_bits(&cpu[0]->env), |
| 739 | &error_abort); |
| 740 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 741 | |
| 742 | return ASTRO_CHIP(dev); |
| 743 | } |
| 744 | |
| 745 | /* |
| 746 | * Create HP C3700 workstation |
| 747 | */ |
| 748 | static void machine_HP_C3700_init(MachineState *machine) |
| 749 | { |
| 750 | PCIBus *pci_bus; |
| 751 | AstroState *astro; |
| 752 | DeviceState *astro_dev; |
| 753 | MemoryRegion *addr_space = get_system_memory(); |
| 754 | TranslateFn *translate; |
| 755 | |
| 756 | /* Create CPUs and RAM. */ |
| 757 | translate = machine_HP_common_init_cpus(machine); |
| 758 | |
| 759 | if (!hppa_is_pa20(&cpu[0]->env)) { |
| 760 | error_report("The HP C3000 workstation requires a 64-bit CPU. " |
| 761 | "Use '-machine B160L' instead."); |
| 762 | exit(1); |
| 763 | } |
| 764 | |
| 765 | /* Init Astro and the Elroys (PCI host bus chips). */ |
| 766 | astro = astro_init(); |
| 767 | astro_dev = DEVICE(astro); |
| 768 | memory_region_add_subregion(addr_space, translate(NULL, ASTRO_HPA), |
| 769 | sysbus_mmio_get_region( |
| 770 | SYS_BUS_DEVICE(astro_dev), 0)); |
| 771 | pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(astro->elroy[0]), "pci")); |
| 772 | assert(pci_bus); |
| 773 | |
| 774 | /* SCSI disk setup. */ |
| 775 | if (drive_get_max_bus(IF_SCSI) >= 0) { |
| 776 | DeviceState *dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a")); |
| 777 | lsi53c8xx_handle_legacy_cmdline(dev); |
| 778 | } |
| 779 | |
| 780 | /* Add NICs, graphics & load firmware */ |
| 781 | machine_HP_common_init_tail(machine, pci_bus, translate); |
| 782 | } |
| 783 | |
| 784 | /* |
| 785 | * Create HP A400 server |
| 786 | */ |
| 787 | static void machine_HP_A400_init(MachineState *machine) |
| 788 | { |
| 789 | struct HppaMachineState *hpm; |
| 790 | |
| 791 | hpm = HPPA_COMMON_MACHINE(machine); |
| 792 | hpm->memsplit_addr = 1 * GiB; |
| 793 | machine_HP_C3700_init(machine); |
| 794 | } |
| 795 | |
| 796 | static void hppa_machine_reset(MachineState *ms, ResetType type) |
| 797 | { |
| 798 | unsigned int smp_cpus = ms->smp.cpus; |
| 799 | int i; |
| 800 | |
| 801 | qemu_devices_reset(type); |
| 802 | |
| 803 | /* Start all CPUs at the firmware entry point. |
| 804 | * Monarch CPU will initialize firmware, secondary CPUs |
| 805 | * will enter a small idle loop and wait for rendevouz. */ |
| 806 | for (i = 0; i < smp_cpus; i++) { |
| 807 | CPUState *cs = CPU(cpu[i]); |
| 808 | |
| 809 | /* reset CPU */ |
| 810 | resettable_reset(OBJECT(cs), RESET_TYPE_COLD); |
| 811 | |
| 812 | cpu_set_pc(cs, firmware_entry); |
| 813 | cpu[i]->env.psw = PSW_Q; |
| 814 | cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000; |
| 815 | } |
| 816 | |
| 817 | cpu[0]->env.gr[26] = ms->ram_size; |
| 818 | cpu[0]->env.gr[25] = cpu[0]->env.kernel_entry; |
| 819 | cpu[0]->env.gr[24] = cpu[0]->env.cmdline_or_bootorder; |
| 820 | cpu[0]->env.gr[23] = cpu[0]->env.initrd_base; |
| 821 | cpu[0]->env.gr[22] = cpu[0]->env.initrd_end; |
| 822 | cpu[0]->env.gr[21] = smp_cpus; |
| 823 | cpu[0]->env.gr[19] = FW_CFG_IO_BASE; |
| 824 | |
| 825 | /* reset static fields to avoid starting Linux kernel & initrd on reboot */ |
| 826 | cpu[0]->env.kernel_entry = 0; |
| 827 | cpu[0]->env.initrd_base = 0; |
| 828 | cpu[0]->env.initrd_end = 0; |
| 829 | cpu[0]->env.cmdline_or_bootorder = 'c'; |
| 830 | } |
| 831 | |
| 832 | static void hppa_nmi(NMIState *ns) |
| 833 | { |
| 834 | CPUState *cs; |
| 835 | |
| 836 | CPU_FOREACH(cs) { |
| 837 | cpu_interrupt(cs, CPU_INTERRUPT_NMI); |
| 838 | } |
| 839 | } |
| 840 | |
| 841 | static void hppa_machine_common_class_init(ObjectClass *oc, const void *data) |
| 842 | { |
| 843 | MachineClass *mc = MACHINE_CLASS(oc); |
| 844 | NMIClass *nc = NMI_CLASS(oc); |
| 845 | |
| 846 | mc->reset = hppa_machine_reset; |
| 847 | mc->block_default_type = IF_SCSI; |
| 848 | mc->default_cpus = 1; |
| 849 | mc->max_cpus = HPPA_MAX_CPUS; |
| 850 | mc->default_boot_order = "cd"; |
| 851 | mc->default_ram_id = "hppa.ram"; |
| 852 | mc->default_nic = "tulip"; |
| 853 | |
| 854 | nc->raise_nmi = hppa_nmi; |
| 855 | } |
| 856 | |
| 857 | static void HP_B160L_machine_init_class_init(ObjectClass *oc, const void *data) |
| 858 | { |
| 859 | static const char * const valid_cpu_types[] = { |
| 860 | TYPE_HPPA_CPU_PA_7300LC, |
| 861 | NULL |
| 862 | }; |
| 863 | MachineClass *mc = MACHINE_CLASS(oc); |
| 864 | |
| 865 | mc->desc = "HP B160L workstation"; |
| 866 | mc->default_cpu_type = TYPE_HPPA_CPU_PA_7300LC; |
| 867 | mc->valid_cpu_types = valid_cpu_types; |
| 868 | mc->init = machine_HP_B160L_init; |
| 869 | mc->is_default = true; |
| 870 | mc->default_ram_size = 512 * MiB; |
| 871 | } |
| 872 | |
| 873 | static void HP_C3700_machine_init_class_init(ObjectClass *oc, const void *data) |
| 874 | { |
| 875 | static const char * const valid_cpu_types[] = { |
| 876 | TYPE_HPPA_CPU_PA_8700, |
| 877 | NULL |
| 878 | }; |
| 879 | MachineClass *mc = MACHINE_CLASS(oc); |
| 880 | |
| 881 | mc->desc = "HP C3700 workstation"; |
| 882 | mc->default_cpu_type = TYPE_HPPA_CPU_PA_8700; |
| 883 | mc->valid_cpu_types = valid_cpu_types; |
| 884 | mc->init = machine_HP_C3700_init; |
| 885 | mc->max_cpus = HPPA_MAX_CPUS; |
| 886 | mc->default_ram_size = 1024 * MiB; |
| 887 | } |
| 888 | |
| 889 | static void HP_A400_machine_init_class_init(ObjectClass *oc, const void *data) |
| 890 | { |
| 891 | static const char * const valid_cpu_types[] = { |
| 892 | TYPE_HPPA_CPU_PA_8500, |
| 893 | NULL |
| 894 | }; |
| 895 | MachineClass *mc = MACHINE_CLASS(oc); |
| 896 | |
| 897 | mc->desc = "HP A400-44 server"; |
| 898 | mc->default_cpu_type = TYPE_HPPA_CPU_PA_8500; |
| 899 | mc->valid_cpu_types = valid_cpu_types; |
| 900 | mc->init = machine_HP_A400_init; |
| 901 | mc->max_cpus = HPPA_MAX_CPUS; |
| 902 | mc->default_ram_size = 1024 * MiB; |
| 903 | } |
| 904 | |
| 905 | static void HP_715_machine_init_class_init(ObjectClass *oc, const void *data) |
| 906 | { |
| 907 | static const char * const valid_cpu_types[] = { |
| 908 | TYPE_HPPA_CPU_PA_7300LC, |
| 909 | NULL |
| 910 | }; |
| 911 | MachineClass *mc = MACHINE_CLASS(oc); |
| 912 | |
| 913 | mc->desc = "HP 715/64 workstation"; |
| 914 | /* |
| 915 | * Although the 715 workstation should use a 7100LC, it can be safely |
| 916 | * modeled as a 7300LC as the difference is a moving of the L1 data cache |
| 917 | * to on-chip. |
| 918 | */ |
| 919 | mc->default_cpu_type = TYPE_HPPA_CPU_PA_7300LC; |
| 920 | mc->valid_cpu_types = valid_cpu_types; |
| 921 | mc->init = machine_HP_715_init; |
| 922 | /* can only support up to max. 8 CPUs due inventory major numbers */ |
| 923 | mc->max_cpus = MIN_CONST(HPPA_MAX_CPUS, 8); |
| 924 | mc->default_ram_size = 256 * MiB; |
| 925 | mc->default_nic = TYPE_LASI_82596; |
| 926 | } |
| 927 | |
| 928 | |
| 929 | static const TypeInfo hppa_machine_types[] = { |
| 930 | { |
| 931 | .name = TYPE_HPPA_COMMON_MACHINE, |
| 932 | .parent = TYPE_MACHINE, |
| 933 | .instance_size = sizeof(HppaMachineState), |
| 934 | .class_init = hppa_machine_common_class_init, |
| 935 | .abstract = true, |
| 936 | .interfaces = (const InterfaceInfo[]) { |
| 937 | { TYPE_NMI }, |
| 938 | { } |
| 939 | }, |
| 940 | }, { |
| 941 | .name = MACHINE_TYPE_NAME("B160L"), |
| 942 | .parent = TYPE_HPPA_COMMON_MACHINE, |
| 943 | .class_init = HP_B160L_machine_init_class_init, |
| 944 | }, { |
| 945 | .name = MACHINE_TYPE_NAME("C3700"), |
| 946 | .parent = TYPE_HPPA_COMMON_MACHINE, |
| 947 | .class_init = HP_C3700_machine_init_class_init, |
| 948 | }, { |
| 949 | .name = MACHINE_TYPE_NAME("A400"), |
| 950 | .parent = TYPE_HPPA_COMMON_MACHINE, |
| 951 | .class_init = HP_A400_machine_init_class_init, |
| 952 | }, { |
| 953 | .name = MACHINE_TYPE_NAME("715"), |
| 954 | .parent = TYPE_HPPA_COMMON_MACHINE, |
| 955 | .class_init = HP_715_machine_init_class_init, |
| 956 | }, |
| 957 | }; |
| 958 | |
| 959 | DEFINE_TYPES(hppa_machine_types) |