| 1 | /* |
| 2 | * Bit-Bang i2c emulation extracted from |
| 3 | * Marvell MV88W8618 / Freecom MusicPal emulation. |
| 4 | * |
| 5 | * Copyright (c) 2008 Jan Kiszka |
| 6 | * |
| 7 | * This code is licensed under the GNU GPL v2. |
| 8 | * |
| 9 | * Contributions after 2012-01-13 are licensed under the terms of the |
| 10 | * GNU GPL, version 2 or (at your option) any later version. |
| 11 | */ |
| 12 | |
| 13 | #include "qemu/osdep.h" |
| 14 | #include "hw/core/irq.h" |
| 15 | #include "hw/i2c/bitbang_i2c.h" |
| 16 | #include "hw/core/sysbus.h" |
| 17 | #include "qemu/module.h" |
| 18 | #include "qom/object.h" |
| 19 | #include "trace.h" |
| 20 | |
| 21 | |
| 22 | /* bitbang_i2c_state enum to name */ |
| 23 | static const char * const sname[] = { |
| 24 | #define NAME(e) [e] = stringify(e) |
| 25 | NAME(STOPPED), |
| 26 | [SENDING_BIT7] = "SENDING_BIT7 (START)", |
| 27 | NAME(SENDING_BIT6), |
| 28 | NAME(SENDING_BIT5), |
| 29 | NAME(SENDING_BIT4), |
| 30 | NAME(SENDING_BIT3), |
| 31 | NAME(SENDING_BIT2), |
| 32 | NAME(SENDING_BIT1), |
| 33 | NAME(SENDING_BIT0), |
| 34 | NAME(WAITING_FOR_ACK), |
| 35 | [RECEIVING_BIT7] = "RECEIVING_BIT7 (ACK)", |
| 36 | NAME(RECEIVING_BIT6), |
| 37 | NAME(RECEIVING_BIT5), |
| 38 | NAME(RECEIVING_BIT4), |
| 39 | NAME(RECEIVING_BIT3), |
| 40 | NAME(RECEIVING_BIT2), |
| 41 | NAME(RECEIVING_BIT1), |
| 42 | NAME(RECEIVING_BIT0), |
| 43 | NAME(SENDING_ACK), |
| 44 | NAME(SENT_NACK) |
| 45 | #undef NAME |
| 46 | }; |
| 47 | |
| 48 | static void bitbang_i2c_set_state(bitbang_i2c_interface *i2c, |
| 49 | bitbang_i2c_state state) |
| 50 | { |
| 51 | trace_bitbang_i2c_state(sname[i2c->state], sname[state]); |
| 52 | i2c->state = state; |
| 53 | } |
| 54 | |
| 55 | static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) |
| 56 | { |
| 57 | if (i2c->current_addr >= 0) |
| 58 | i2c_end_transfer(i2c->bus); |
| 59 | i2c->current_addr = -1; |
| 60 | bitbang_i2c_set_state(i2c, STOPPED); |
| 61 | } |
| 62 | |
| 63 | /* Set device data pin. */ |
| 64 | static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) |
| 65 | { |
| 66 | trace_bitbang_i2c_data(i2c->last_clock, i2c->last_data, |
| 67 | i2c->device_out, level); |
| 68 | i2c->device_out = level; |
| 69 | |
| 70 | return level & i2c->last_data; |
| 71 | } |
| 72 | |
| 73 | /* Leave device data pin unmodified. */ |
| 74 | static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) |
| 75 | { |
| 76 | return bitbang_i2c_ret(i2c, i2c->device_out); |
| 77 | } |
| 78 | |
| 79 | /* Returns data line level. */ |
| 80 | int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) |
| 81 | { |
| 82 | int data; |
| 83 | |
| 84 | if (level != 0 && level != 1) { |
| 85 | abort(); |
| 86 | } |
| 87 | |
| 88 | if (line == BITBANG_I2C_SDA) { |
| 89 | if (level == i2c->last_data) { |
| 90 | return bitbang_i2c_nop(i2c); |
| 91 | } |
| 92 | i2c->last_data = level; |
| 93 | if (i2c->last_clock == 0) { |
| 94 | return bitbang_i2c_nop(i2c); |
| 95 | } |
| 96 | if (level == 0) { |
| 97 | /* START condition. */ |
| 98 | bitbang_i2c_set_state(i2c, SENDING_BIT7); |
| 99 | i2c->current_addr = -1; |
| 100 | } else { |
| 101 | /* STOP condition. */ |
| 102 | bitbang_i2c_enter_stop(i2c); |
| 103 | } |
| 104 | return bitbang_i2c_ret(i2c, 1); |
| 105 | } |
| 106 | |
| 107 | data = i2c->last_data; |
| 108 | if (i2c->last_clock == level) { |
| 109 | return bitbang_i2c_nop(i2c); |
| 110 | } |
| 111 | i2c->last_clock = level; |
| 112 | if (level == 0) { |
| 113 | /* State is set/read at the start of the clock pulse. |
| 114 | release the data line at the end. */ |
| 115 | return bitbang_i2c_ret(i2c, 1); |
| 116 | } |
| 117 | switch (i2c->state) { |
| 118 | case STOPPED: |
| 119 | case SENT_NACK: |
| 120 | return bitbang_i2c_ret(i2c, 1); |
| 121 | |
| 122 | case SENDING_BIT7 ... SENDING_BIT0: |
| 123 | i2c->buffer = (i2c->buffer << 1) | data; |
| 124 | /* will end up in WAITING_FOR_ACK */ |
| 125 | bitbang_i2c_set_state(i2c, i2c->state + 1); |
| 126 | return bitbang_i2c_ret(i2c, 1); |
| 127 | |
| 128 | case WAITING_FOR_ACK: |
| 129 | { |
| 130 | int ret; |
| 131 | |
| 132 | if (i2c->current_addr < 0) { |
| 133 | i2c->current_addr = i2c->buffer; |
| 134 | trace_bitbang_i2c_addr(i2c->current_addr); |
| 135 | ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, |
| 136 | i2c->current_addr & 1); |
| 137 | } else { |
| 138 | trace_bitbang_i2c_send(i2c->buffer); |
| 139 | ret = i2c_send(i2c->bus, i2c->buffer); |
| 140 | } |
| 141 | if (ret) { |
| 142 | /* NACK (either addressing a nonexistent device, or the |
| 143 | * device we were sending to decided to NACK us). |
| 144 | */ |
| 145 | bitbang_i2c_set_state(i2c, SENT_NACK); |
| 146 | bitbang_i2c_enter_stop(i2c); |
| 147 | return bitbang_i2c_ret(i2c, 1); |
| 148 | } |
| 149 | if (i2c->current_addr & 1) { |
| 150 | bitbang_i2c_set_state(i2c, RECEIVING_BIT7); |
| 151 | } else { |
| 152 | bitbang_i2c_set_state(i2c, SENDING_BIT7); |
| 153 | } |
| 154 | return bitbang_i2c_ret(i2c, 0); |
| 155 | } |
| 156 | case RECEIVING_BIT7: |
| 157 | i2c->buffer = i2c_recv(i2c->bus); |
| 158 | trace_bitbang_i2c_recv(i2c->buffer); |
| 159 | /* Fall through... */ |
| 160 | case RECEIVING_BIT6 ... RECEIVING_BIT0: |
| 161 | data = i2c->buffer >> 7; |
| 162 | /* will end up in SENDING_ACK */ |
| 163 | bitbang_i2c_set_state(i2c, i2c->state + 1); |
| 164 | i2c->buffer <<= 1; |
| 165 | return bitbang_i2c_ret(i2c, data); |
| 166 | |
| 167 | case SENDING_ACK: |
| 168 | if (data != 0) { |
| 169 | bitbang_i2c_set_state(i2c, SENT_NACK); |
| 170 | i2c_nack(i2c->bus); |
| 171 | } else { |
| 172 | bitbang_i2c_set_state(i2c, RECEIVING_BIT7); |
| 173 | } |
| 174 | return bitbang_i2c_ret(i2c, 1); |
| 175 | } |
| 176 | abort(); |
| 177 | } |
| 178 | |
| 179 | void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus) |
| 180 | { |
| 181 | s->bus = bus; |
| 182 | s->last_data = 1; |
| 183 | s->last_clock = 1; |
| 184 | s->device_out = 1; |
| 185 | } |
| 186 | |
| 187 | /* GPIO interface. */ |
| 188 | |
| 189 | OBJECT_DECLARE_SIMPLE_TYPE(GPIOI2CState, GPIO_I2C) |
| 190 | |
| 191 | struct GPIOI2CState { |
| 192 | /*< private >*/ |
| 193 | SysBusDevice parent_obj; |
| 194 | /*< public >*/ |
| 195 | |
| 196 | bitbang_i2c_interface bitbang; |
| 197 | int last_level; |
| 198 | qemu_irq out; |
| 199 | }; |
| 200 | |
| 201 | static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) |
| 202 | { |
| 203 | GPIOI2CState *s = opaque; |
| 204 | |
| 205 | level = bitbang_i2c_set(&s->bitbang, irq, level); |
| 206 | if (level != s->last_level) { |
| 207 | s->last_level = level; |
| 208 | qemu_set_irq(s->out, level); |
| 209 | } |
| 210 | } |
| 211 | |
| 212 | static void gpio_i2c_init(Object *obj) |
| 213 | { |
| 214 | DeviceState *dev = DEVICE(obj); |
| 215 | GPIOI2CState *s = GPIO_I2C(obj); |
| 216 | I2CBus *bus; |
| 217 | |
| 218 | bus = i2c_init_bus(dev, "i2c"); |
| 219 | bitbang_i2c_init(&s->bitbang, bus); |
| 220 | |
| 221 | qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2); |
| 222 | qdev_init_gpio_out(dev, &s->out, 1); |
| 223 | } |
| 224 | |
| 225 | static void gpio_i2c_class_init(ObjectClass *klass, const void *data) |
| 226 | { |
| 227 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 228 | |
| 229 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
| 230 | dc->desc = "Virtual GPIO to I2C bridge"; |
| 231 | } |
| 232 | |
| 233 | static const TypeInfo gpio_i2c_info = { |
| 234 | .name = TYPE_GPIO_I2C, |
| 235 | .parent = TYPE_SYS_BUS_DEVICE, |
| 236 | .instance_size = sizeof(GPIOI2CState), |
| 237 | .instance_init = gpio_i2c_init, |
| 238 | .class_init = gpio_i2c_class_init, |
| 239 | }; |
| 240 | |
| 241 | static void bitbang_i2c_register_types(void) |
| 242 | { |
| 243 | type_register_static(&gpio_i2c_info); |
| 244 | } |
| 245 | |
| 246 | type_init(bitbang_i2c_register_types) |