| 1 | /* |
| 2 | * Intel IOMMU acceleration with nested translation |
| 3 | * |
| 4 | * Copyright (C) 2026 Intel Corporation. |
| 5 | * |
| 6 | * Authors: Zhenzhong Duan <zhenzhong.duan@intel.com> |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 9 | */ |
| 10 | |
| 11 | #ifndef HW_I386_INTEL_IOMMU_ACCEL_H |
| 12 | #define HW_I386_INTEL_IOMMU_ACCEL_H |
| 13 | #include CONFIG_DEVICES |
| 14 | |
| 15 | typedef struct VTDAccelPASIDCacheEntry { |
| 16 | VTDHostIOMMUDevice *vtd_hiod; |
| 17 | VTDPASIDEntry pasid_entry; |
| 18 | uint32_t pasid; |
| 19 | uint32_t fs_hwpt_id; |
| 20 | QLIST_ENTRY(VTDAccelPASIDCacheEntry) next; |
| 21 | } VTDAccelPASIDCacheEntry; |
| 22 | |
| 23 | #ifdef CONFIG_VTD_ACCEL |
| 24 | bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod, |
| 25 | Error **errp); |
| 26 | VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as); |
| 27 | void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id, |
| 28 | uint32_t pasid, hwaddr addr, |
| 29 | uint64_t npages, bool ih); |
| 30 | void vtd_accel_pasid_cache_sync(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info); |
| 31 | void vtd_accel_pasid_cache_reset(IntelIOMMUState *s); |
| 32 | void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops); |
| 33 | #else |
| 34 | static inline bool vtd_check_hiod_accel(IntelIOMMUState *s, |
| 35 | VTDHostIOMMUDevice *vtd_hiod, |
| 36 | Error **errp) |
| 37 | { |
| 38 | error_setg(errp, "host IOMMU cannot be checked!"); |
| 39 | error_append_hint(errp, "CONFIG_VTD_ACCEL is not enabled"); |
| 40 | return false; |
| 41 | } |
| 42 | |
| 43 | static inline VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as) |
| 44 | { |
| 45 | return NULL; |
| 46 | } |
| 47 | |
| 48 | static inline bool vtd_propagate_guest_pasid(VTDAddressSpace *vtd_as, |
| 49 | Error **errp) |
| 50 | { |
| 51 | return true; |
| 52 | } |
| 53 | |
| 54 | static inline void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, |
| 55 | uint16_t domain_id, |
| 56 | uint32_t pasid, hwaddr addr, |
| 57 | uint64_t npages, bool ih) |
| 58 | { |
| 59 | } |
| 60 | |
| 61 | static inline void vtd_accel_pasid_cache_sync(IntelIOMMUState *s, |
| 62 | VTDPASIDCacheInfo *pc_info) |
| 63 | { |
| 64 | } |
| 65 | |
| 66 | static inline void vtd_accel_pasid_cache_reset(IntelIOMMUState *s) |
| 67 | { |
| 68 | } |
| 69 | |
| 70 | static inline void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops) |
| 71 | { |
| 72 | } |
| 73 | #endif |
| 74 | #endif |