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1 /*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include CONFIG_DEVICES
27
28 #include "qemu/units.h"
29 #include "hw/char/parallel-isa.h"
30 #include "hw/i386/x86.h"
31 #include "hw/i386/pc.h"
32 #include "hw/i386/apic.h"
33 #include "hw/pci-host/i440fx.h"
34 #include "hw/southbridge/piix.h"
35 #include "hw/display/ramfb.h"
36 #include "hw/pci/pci.h"
37 #include "hw/pci/pci_ids.h"
38 #include "hw/usb/usb.h"
39 #include "net/net.h"
40 #include "hw/ide/pci.h"
41 #include "hw/core/irq.h"
42 #include "system/kvm.h"
43 #include "hw/i386/kvm/clock.h"
44 #include "hw/core/sysbus.h"
45 #include "hw/i2c/smbus_eeprom.h"
46 #include "system/memory.h"
47 #include "hw/acpi/acpi.h"
48 #include "hw/vfio/types.h"
49 #include "qapi/error.h"
50 #include "qemu/error-report.h"
51 #include "system/xen.h"
52 #ifdef CONFIG_XEN
53 #include <xen/hvm/hvm_info_table.h>
54 #include "hw/xen/xen_pt.h"
55 #include "hw/xen/xen_igd.h"
56 #endif
57 #include "hw/xen/xen-x86.h"
58 #include "hw/xen/xen.h"
59 #include "migration/global_state.h"
60 #include "migration/misc.h"
61 #include "system/runstate.h"
62 #include "system/numa.h"
63 #include "hw/hyperv/vmbus-bridge.h"
64 #include "hw/mem/nvdimm.h"
65 #include "hw/uefi/var-service-api.h"
66 #include "hw/i386/acpi-build.h"
67 #include "target/i386/cpu.h"
68
69 #define XEN_IOAPIC_NUM_PIRQS 128ULL
70
71 static GlobalProperty pc_piix_compat_defaults[] = {
72 { TYPE_RAMFB_DEVICE, "use-legacy-x86-rom", "true" },
73 { TYPE_VFIO_PCI_NOHOTPLUG, "use-legacy-x86-rom", "true" },
74 };
75 static const size_t pc_piix_compat_defaults_len =
76 G_N_ELEMENTS(pc_piix_compat_defaults);
77
78 /*
79 * Return the global irq number corresponding to a given device irq
80 * pin. We could also use the bus number to have a more precise mapping.
81 */
82 static int pc_pci_slot_get_pirq(PCIDevice *pci_dev, int pci_intx)
83 {
84 int slot_addend;
85 slot_addend = PCI_SLOT(pci_dev->devfn) - 1;
86 return (pci_intx + slot_addend) & 3;
87 }
88
89 static void piix_intx_routing_notifier_xen(PCIDevice *dev)
90 {
91 int i;
92
93 /* Scan for updates to PCI link routes. */
94 for (i = 0; i < PIIX_NUM_PIRQS; i++) {
95 const PCIINTxRoute route = pci_device_route_intx_to_irq(dev, i);
96 const uint8_t v = route.mode == PCI_INTX_ENABLED ? route.irq : 0;
97 xen_set_pci_link_route(i, v);
98 }
99 }
100
101 /* PC hardware initialisation */
102 static void pc_init1(MachineState *machine, const char *pci_type)
103 {
104 PCMachineState *pcms = PC_MACHINE(machine);
105 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
106 X86MachineState *x86ms = X86_MACHINE(machine);
107 MemoryRegion *system_memory = get_system_memory();
108 MemoryRegion *system_io = get_system_io();
109 Object *phb;
110 ISABus *isa_bus;
111 Object *piix4_pm = NULL;
112 qemu_irq smi_irq;
113 GSIState *gsi_state;
114 MemoryRegion *ram_memory;
115 MemoryRegion *pci_memory = NULL;
116 ram_addr_t lowmem;
117 uint64_t hole64_size = 0;
118 PCIDevice *pci_dev;
119 DeviceState *dev;
120 size_t i;
121
122 assert(pcmc->pci_enabled);
123
124 /*
125 * Calculate ram split, for memory below and above 4G. It's a bit
126 * complicated for backward compatibility reasons ...
127 *
128 * - Traditional split is 3.5G (lowmem = 0xe0000000). This is the
129 * default value for max_ram_below_4g now.
130 *
131 * - Then, to gigabyte align the memory, we move the split to 3G
132 * (lowmem = 0xc0000000). But only in case we have to split in
133 * the first place, i.e. ram_size is larger than (traditional)
134 * lowmem. And for new machine types (gigabyte_align = true)
135 * only, for live migration compatibility reasons.
136 *
137 * - Next the max-ram-below-4g option was added, which allowed to
138 * reduce lowmem to a smaller value, to allow a larger PCI I/O
139 * window below 4G. qemu doesn't enforce gigabyte alignment here,
140 * but prints a warning.
141 *
142 * - Finally max-ram-below-4g got updated to also allow raising lowmem,
143 * so legacy non-PAE guests can get as much memory as possible in
144 * the 32bit address space below 4G.
145 *
146 * - Note that Xen has its own ram setup code in xen_ram_init(),
147 * called via xen_hvm_init_pc().
148 *
149 * Examples:
150 * qemu -M pc-1.7 -m 4G (old default) -> 3584M low, 512M high
151 * qemu -M pc -m 4G (new default) -> 3072M low, 1024M high
152 * qemu -M pc,max-ram-below-4g=2G -m 4G -> 2048M low, 2048M high
153 * qemu -M pc,max-ram-below-4g=4G -m 3968M -> 3968M low (=4G-128M)
154 */
155 if (xen_enabled()) {
156 xen_hvm_init_pc(pcms, &ram_memory);
157 } else {
158 ram_memory = machine->ram;
159 if (!pcms->max_ram_below_4g) {
160 pcms->max_ram_below_4g = 0xe0000000; /* default: 3.5G */
161 }
162 lowmem = pcms->max_ram_below_4g;
163 if (machine->ram_size >= pcms->max_ram_below_4g) {
164 if (pcmc->gigabyte_align) {
165 if (lowmem > 0xc0000000) {
166 lowmem = 0xc0000000;
167 }
168 if (lowmem & (1 * GiB - 1)) {
169 warn_report("Large machine and max_ram_below_4g "
170 "(%" PRIu64 ") not a multiple of 1G; "
171 "possible bad performance.",
172 pcms->max_ram_below_4g);
173 }
174 }
175 }
176
177 if (machine->ram_size >= lowmem) {
178 x86ms->above_4g_mem_size = machine->ram_size - lowmem;
179 x86ms->below_4g_mem_size = lowmem;
180 } else {
181 x86ms->above_4g_mem_size = 0;
182 x86ms->below_4g_mem_size = machine->ram_size;
183 }
184 }
185
186 pc_machine_init_sgx_epc(pcms);
187 x86_cpus_init(x86ms, pcmc->default_cpu_version);
188
189 if (kvm_enabled()) {
190 kvmclock_create(pcmc->kvmclock_create_always);
191 }
192
193 pci_memory = g_new(MemoryRegion, 1);
194 memory_region_init(pci_memory, NULL, "pci", UINT64_MAX);
195
196 phb = OBJECT(qdev_new(TYPE_I440FX_PCI_HOST_BRIDGE));
197 object_property_add_child(OBJECT(machine), "i440fx", phb);
198 object_property_set_link(phb, PCI_HOST_PROP_RAM_MEM,
199 OBJECT(ram_memory), &error_fatal);
200 object_property_set_link(phb, PCI_HOST_PROP_PCI_MEM,
201 OBJECT(pci_memory), &error_fatal);
202 object_property_set_link(phb, PCI_HOST_PROP_SYSTEM_MEM,
203 OBJECT(system_memory), &error_fatal);
204 object_property_set_link(phb, PCI_HOST_PROP_IO_MEM,
205 OBJECT(system_io), &error_fatal);
206 object_property_set_uint(phb, PCI_HOST_BELOW_4G_MEM_SIZE,
207 x86ms->below_4g_mem_size, &error_fatal);
208 object_property_set_uint(phb, PCI_HOST_ABOVE_4G_MEM_SIZE,
209 x86ms->above_4g_mem_size, &error_fatal);
210 object_property_set_str(phb, I440FX_HOST_PROP_PCI_TYPE, pci_type,
211 &error_fatal);
212 sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
213
214 pcms->pcibus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
215 pci_bus_map_irqs(pcms->pcibus,
216 xen_enabled() ? xen_pci_slot_get_pirq
217 : pc_pci_slot_get_pirq);
218
219 hole64_size = object_property_get_uint(phb,
220 PCI_HOST_PROP_PCI_HOLE64_SIZE,
221 &error_abort);
222
223 /* allocate ram and load rom/bios */
224 if (!xen_enabled()) {
225 pc_memory_init(pcms, system_memory, pci_memory, hole64_size);
226 } else {
227 assert(machine->ram_size == x86ms->below_4g_mem_size +
228 x86ms->above_4g_mem_size);
229
230 pc_system_flash_cleanup_unused(pcms);
231 if (machine->kernel_filename != NULL) {
232 /* For xen HVM direct kernel boot, load linux here */
233 xen_load_linux(pcms);
234 }
235 }
236
237 gsi_state = pc_gsi_create(&x86ms->gsi, true);
238
239 pci_dev = pci_new_multifunction(-1, pcms->south_bridge);
240 object_property_set_bool(OBJECT(pci_dev), "has-usb",
241 machine_usb(machine), &error_abort);
242 object_property_set_bool(OBJECT(pci_dev), "has-acpi",
243 x86_machine_is_acpi_enabled(x86ms),
244 &error_abort);
245 object_property_set_bool(OBJECT(pci_dev), "has-pic", false,
246 &error_abort);
247 object_property_set_bool(OBJECT(pci_dev), "has-pit", false,
248 &error_abort);
249 qdev_prop_set_uint32(DEVICE(pci_dev), "smb_io_base", 0xb100);
250 object_property_set_bool(OBJECT(pci_dev), "smm-enabled",
251 x86_machine_is_smm_enabled(x86ms),
252 &error_abort);
253 dev = DEVICE(pci_dev);
254 for (i = 0; i < ISA_NUM_IRQS; i++) {
255 qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]);
256 }
257 pci_realize_and_unref(pci_dev, pcms->pcibus, &error_fatal);
258
259 if (xen_enabled()) {
260 pci_device_set_intx_routing_notifier(
261 pci_dev, piix_intx_routing_notifier_xen);
262
263 /*
264 * Xen supports additional interrupt routes from the PCI devices to
265 * the IOAPIC: the four pins of each PCI device on the bus are also
266 * connected to the IOAPIC directly.
267 * These additional routes can be discovered through ACPI.
268 */
269 pci_bus_irqs(pcms->pcibus, xen_intx_set_irq, pci_dev,
270 XEN_IOAPIC_NUM_PIRQS);
271 }
272
273 isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(pci_dev), "isa.0"));
274 x86ms->rtc = ISA_DEVICE(object_resolve_path_component(OBJECT(pci_dev),
275 "rtc"));
276 piix4_pm = object_resolve_path_component(OBJECT(pci_dev), "pm");
277 dev = DEVICE(object_resolve_path_component(OBJECT(pci_dev), "ide"));
278 pci_ide_create_devs(PCI_DEVICE(dev));
279 pcms->idebus[0] = qdev_get_child_bus(dev, "ide.0");
280 pcms->idebus[1] = qdev_get_child_bus(dev, "ide.1");
281
282
283 if (x86ms->pic == ON_OFF_AUTO_ON || x86ms->pic == ON_OFF_AUTO_AUTO) {
284 pc_i8259_create(isa_bus, gsi_state->i8259_irq);
285 }
286
287 ioapic_init_gsi(gsi_state, phb);
288
289 if (tcg_enabled()) {
290 x86_register_ferr_irq(x86ms->gsi[13]);
291 }
292
293 pc_vga_init(isa_bus, pcms->pcibus);
294
295 /* init basic PC hardware */
296 pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc,
297 !MACHINE_CLASS(pcmc)->no_floppy, 0x4);
298
299 pc_nic_init(pcmc, isa_bus, pcms->pcibus);
300
301 if (piix4_pm) {
302 smi_irq = qemu_allocate_irq(pc_acpi_smi_interrupt, first_cpu, 0);
303
304 qdev_connect_gpio_out_named(DEVICE(piix4_pm), "smi-irq", 0, smi_irq);
305 pcms->smbus = I2C_BUS(qdev_get_child_bus(DEVICE(piix4_pm), "i2c"));
306 /* TODO: Populate SPD eeprom data. */
307 smbus_eeprom_init(pcms->smbus, 8, NULL, 0);
308
309 object_property_add_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
310 TYPE_HOTPLUG_HANDLER,
311 (Object **)&x86ms->acpi_dev,
312 object_property_allow_set_link,
313 OBJ_PROP_LINK_STRONG);
314 object_property_set_link(OBJECT(machine), PC_MACHINE_ACPI_DEVICE_PROP,
315 piix4_pm, &error_abort);
316 }
317
318 if (machine->nvdimms_state->is_enabled) {
319 nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
320 x86_nvdimm_acpi_dsmio,
321 x86ms->fw_cfg, OBJECT(pcms));
322 }
323 }
324
325 typedef enum PCSouthBridgeOption {
326 PC_SOUTH_BRIDGE_OPTION_PIIX3,
327 PC_SOUTH_BRIDGE_OPTION_PIIX4,
328 PC_SOUTH_BRIDGE_OPTION_MAX,
329 } PCSouthBridgeOption;
330
331 static const QEnumLookup PCSouthBridgeOption_lookup = {
332 .array = (const char *const[]) {
333 [PC_SOUTH_BRIDGE_OPTION_PIIX3] = TYPE_PIIX3_DEVICE,
334 [PC_SOUTH_BRIDGE_OPTION_PIIX4] = TYPE_PIIX4_PCI_DEVICE,
335 },
336 .size = PC_SOUTH_BRIDGE_OPTION_MAX
337 };
338
339 static int pc_get_south_bridge(Object *obj, Error **errp)
340 {
341 PCMachineState *pcms = PC_MACHINE(obj);
342 int i;
343
344 for (i = 0; i < PCSouthBridgeOption_lookup.size; i++) {
345 if (g_strcmp0(PCSouthBridgeOption_lookup.array[i],
346 pcms->south_bridge) == 0) {
347 return i;
348 }
349 }
350
351 error_setg(errp, "Invalid south bridge value set");
352 return 0;
353 }
354
355 static void pc_set_south_bridge(Object *obj, int value, Error **errp)
356 {
357 PCMachineState *pcms = PC_MACHINE(obj);
358
359 if (value < 0) {
360 error_setg(errp, "Value can't be negative");
361 return;
362 }
363
364 if (value >= PCSouthBridgeOption_lookup.size) {
365 error_setg(errp, "Value too big");
366 return;
367 }
368
369 pcms->south_bridge = PCSouthBridgeOption_lookup.array[value];
370 }
371
372 #ifdef CONFIG_XEN
373 static void pc_xen_hvm_init(MachineState *machine)
374 {
375 PCMachineState *pcms = PC_MACHINE(machine);
376
377 if (!xen_enabled()) {
378 error_report("xenfv machine requires the xen accelerator");
379 exit(1);
380 }
381
382 pc_init1(machine, xen_igd_gfx_pt_enabled()
383 ? TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE
384 : TYPE_I440FX_PCI_DEVICE);
385
386 xen_igd_reserve_slot(pcms->pcibus);
387 pci_create_simple(pcms->pcibus, -1, "xen-platform");
388 }
389 #endif
390
391 static void pc_i440fx_init(MachineState *machine)
392 {
393 pc_init1(machine, TYPE_I440FX_PCI_DEVICE);
394 }
395
396 #define DEFINE_I440FX_MACHINE(major, minor) \
397 DEFINE_PC_VER_MACHINE(pc_i440fx, "pc-i440fx", pc_i440fx_init, false, NULL, major, minor);
398
399 #define DEFINE_I440FX_MACHINE_AS_LATEST(major, minor) \
400 DEFINE_PC_VER_MACHINE(pc_i440fx, "pc-i440fx", pc_i440fx_init, true, "pc", major, minor);
401
402 static void pc_i440fx_machine_options(MachineClass *m)
403 {
404 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
405 ObjectClass *oc = OBJECT_CLASS(m);
406 pcmc->default_south_bridge = TYPE_PIIX3_DEVICE;
407 pcmc->pci_root_uid = 0;
408 pcmc->default_cpu_version = 1;
409
410 m->family = "pc_piix";
411 m->desc = "Standard PC (i440FX + PIIX, 1996)";
412 m->default_machine_opts = "firmware=bios-256k.bin";
413 m->default_display = "std";
414 m->default_nic = "e1000";
415 m->no_floppy = !module_object_class_by_name(TYPE_ISA_FDC);
416 m->no_parallel = !module_object_class_by_name(TYPE_ISA_PARALLEL);
417 machine_class_allow_dynamic_sysbus_dev(m, TYPE_RAMFB_DEVICE);
418 machine_class_allow_dynamic_sysbus_dev(m, TYPE_VMBUS_BRIDGE);
419 machine_class_allow_dynamic_sysbus_dev(m, TYPE_UEFI_VARS_X64);
420
421 object_class_property_add_enum(oc, "x-south-bridge", "PCSouthBridgeOption",
422 &PCSouthBridgeOption_lookup,
423 pc_get_south_bridge,
424 pc_set_south_bridge);
425 object_class_property_set_description(oc, "x-south-bridge",
426 "Use a different south bridge than PIIX3");
427 compat_props_add(m->compat_props,
428 pc_piix_compat_defaults, pc_piix_compat_defaults_len);
429 }
430
431 static void pc_i440fx_machine_11_2_options(MachineClass *m)
432 {
433 pc_i440fx_machine_options(m);
434 }
435
436 DEFINE_I440FX_MACHINE_AS_LATEST(11, 2);
437
438 static void pc_i440fx_machine_11_1_options(MachineClass *m)
439 {
440 pc_i440fx_machine_11_2_options(m);
441 compat_props_add(m->compat_props, hw_compat_11_1, hw_compat_11_1_len);
442 compat_props_add(m->compat_props, pc_compat_11_1, pc_compat_11_1_len);
443 }
444
445 DEFINE_I440FX_MACHINE(11, 1);
446
447 static void pc_i440fx_machine_11_0_options(MachineClass *m)
448 {
449 pc_i440fx_machine_11_1_options(m);
450 compat_props_add(m->compat_props, hw_compat_11_0, hw_compat_11_0_len);
451 compat_props_add(m->compat_props, pc_compat_11_0, pc_compat_11_0_len);
452 }
453
454 DEFINE_I440FX_MACHINE(11, 0);
455
456 static void pc_i440fx_machine_10_2_options(MachineClass *m)
457 {
458 pc_i440fx_machine_11_0_options(m);
459 compat_props_add(m->compat_props, hw_compat_10_2, hw_compat_10_2_len);
460 compat_props_add(m->compat_props, pc_compat_10_2, pc_compat_10_2_len);
461 }
462
463 DEFINE_I440FX_MACHINE(10, 2);
464
465 static void pc_i440fx_machine_10_1_options(MachineClass *m)
466 {
467 pc_i440fx_machine_10_2_options(m);
468 m->smbios_memory_device_size = 2047 * TiB;
469 compat_props_add(m->compat_props, hw_compat_10_1, hw_compat_10_1_len);
470 compat_props_add(m->compat_props, pc_compat_10_1, pc_compat_10_1_len);
471 }
472
473 DEFINE_I440FX_MACHINE(10, 1);
474
475 static void pc_i440fx_machine_10_0_options(MachineClass *m)
476 {
477 pc_i440fx_machine_10_1_options(m);
478 compat_props_add(m->compat_props, hw_compat_10_0, hw_compat_10_0_len);
479 compat_props_add(m->compat_props, pc_compat_10_0, pc_compat_10_0_len);
480 }
481
482 DEFINE_I440FX_MACHINE(10, 0);
483
484 static void pc_i440fx_machine_9_2_options(MachineClass *m)
485 {
486 pc_i440fx_machine_10_0_options(m);
487 compat_props_add(m->compat_props, hw_compat_9_2, hw_compat_9_2_len);
488 compat_props_add(m->compat_props, pc_compat_9_2, pc_compat_9_2_len);
489 }
490
491 DEFINE_I440FX_MACHINE(9, 2);
492
493 static void pc_i440fx_machine_9_1_options(MachineClass *m)
494 {
495 pc_i440fx_machine_9_2_options(m);
496 compat_props_add(m->compat_props, hw_compat_9_1, hw_compat_9_1_len);
497 compat_props_add(m->compat_props, pc_compat_9_1, pc_compat_9_1_len);
498 }
499
500 DEFINE_I440FX_MACHINE(9, 1);
501
502 static void pc_i440fx_machine_9_0_options(MachineClass *m)
503 {
504 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
505
506 pc_i440fx_machine_9_1_options(m);
507 m->smbios_memory_device_size = 16 * GiB;
508
509 compat_props_add(m->compat_props, hw_compat_9_0, hw_compat_9_0_len);
510 compat_props_add(m->compat_props, pc_compat_9_0, pc_compat_9_0_len);
511 pcmc->isa_bios_alias = false;
512 }
513
514 DEFINE_I440FX_MACHINE(9, 0);
515
516 static void pc_i440fx_machine_8_2_options(MachineClass *m)
517 {
518 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
519
520 pc_i440fx_machine_9_0_options(m);
521
522 compat_props_add(m->compat_props, hw_compat_8_2, hw_compat_8_2_len);
523 compat_props_add(m->compat_props, pc_compat_8_2, pc_compat_8_2_len);
524 /* For pc-i44fx-8.2 and 8.1, use SMBIOS 3.X by default */
525 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_64;
526 }
527
528 DEFINE_I440FX_MACHINE(8, 2);
529
530 static void pc_i440fx_machine_8_1_options(MachineClass *m)
531 {
532 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
533
534 pc_i440fx_machine_8_2_options(m);
535 pcmc->broken_32bit_mem_addr_check = true;
536
537 compat_props_add(m->compat_props, hw_compat_8_1, hw_compat_8_1_len);
538 compat_props_add(m->compat_props, pc_compat_8_1, pc_compat_8_1_len);
539 }
540
541 DEFINE_I440FX_MACHINE(8, 1);
542
543 static void pc_i440fx_machine_8_0_options(MachineClass *m)
544 {
545 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
546
547 pc_i440fx_machine_8_1_options(m);
548 compat_props_add(m->compat_props, hw_compat_8_0, hw_compat_8_0_len);
549 compat_props_add(m->compat_props, pc_compat_8_0, pc_compat_8_0_len);
550
551 /* For pc-i44fx-8.0 and older, use SMBIOS 2.8 by default */
552 pcmc->default_smbios_ep_type = SMBIOS_ENTRY_POINT_TYPE_32;
553 }
554
555 DEFINE_I440FX_MACHINE(8, 0);
556
557 static void pc_i440fx_machine_7_2_options(MachineClass *m)
558 {
559 pc_i440fx_machine_8_0_options(m);
560 compat_props_add(m->compat_props, hw_compat_7_2, hw_compat_7_2_len);
561 compat_props_add(m->compat_props, pc_compat_7_2, pc_compat_7_2_len);
562 }
563
564 DEFINE_I440FX_MACHINE(7, 2)
565
566 static void pc_i440fx_machine_7_1_options(MachineClass *m)
567 {
568 pc_i440fx_machine_7_2_options(m);
569 compat_props_add(m->compat_props, hw_compat_7_1, hw_compat_7_1_len);
570 compat_props_add(m->compat_props, pc_compat_7_1, pc_compat_7_1_len);
571 }
572
573 DEFINE_I440FX_MACHINE(7, 1);
574
575 static void pc_i440fx_machine_7_0_options(MachineClass *m)
576 {
577 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
578 pc_i440fx_machine_7_1_options(m);
579 pcmc->enforce_amd_1tb_hole = false;
580 compat_props_add(m->compat_props, hw_compat_7_0, hw_compat_7_0_len);
581 compat_props_add(m->compat_props, pc_compat_7_0, pc_compat_7_0_len);
582 }
583
584 DEFINE_I440FX_MACHINE(7, 0);
585
586 static void pc_i440fx_machine_6_2_options(MachineClass *m)
587 {
588 pc_i440fx_machine_7_0_options(m);
589 compat_props_add(m->compat_props, hw_compat_6_2, hw_compat_6_2_len);
590 compat_props_add(m->compat_props, pc_compat_6_2, pc_compat_6_2_len);
591 }
592
593 DEFINE_I440FX_MACHINE(6, 2);
594
595 static void pc_i440fx_machine_6_1_options(MachineClass *m)
596 {
597 pc_i440fx_machine_6_2_options(m);
598 compat_props_add(m->compat_props, hw_compat_6_1, hw_compat_6_1_len);
599 compat_props_add(m->compat_props, pc_compat_6_1, pc_compat_6_1_len);
600 m->smp_props.prefer_sockets = true;
601 }
602
603 DEFINE_I440FX_MACHINE(6, 1);
604
605 static void pc_i440fx_machine_6_0_options(MachineClass *m)
606 {
607 pc_i440fx_machine_6_1_options(m);
608 compat_props_add(m->compat_props, hw_compat_6_0, hw_compat_6_0_len);
609 compat_props_add(m->compat_props, pc_compat_6_0, pc_compat_6_0_len);
610 }
611
612 DEFINE_I440FX_MACHINE(6, 0);
613
614 static void pc_i440fx_machine_5_2_options(MachineClass *m)
615 {
616 pc_i440fx_machine_6_0_options(m);
617 compat_props_add(m->compat_props, hw_compat_5_2, hw_compat_5_2_len);
618 compat_props_add(m->compat_props, pc_compat_5_2, pc_compat_5_2_len);
619 }
620
621 DEFINE_I440FX_MACHINE(5, 2);
622
623 static void pc_i440fx_machine_5_1_options(MachineClass *m)
624 {
625 PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
626
627 pc_i440fx_machine_5_2_options(m);
628 compat_props_add(m->compat_props, hw_compat_5_1, hw_compat_5_1_len);
629 compat_props_add(m->compat_props, pc_compat_5_1, pc_compat_5_1_len);
630 pcmc->kvmclock_create_always = false;
631 pcmc->pci_root_uid = 1;
632 }
633
634 DEFINE_I440FX_MACHINE(5, 1);
635
636 static void pc_i440fx_machine_5_0_options(MachineClass *m)
637 {
638 pc_i440fx_machine_5_1_options(m);
639 m->numa_mem_supported = true;
640 compat_props_add(m->compat_props, hw_compat_5_0, hw_compat_5_0_len);
641 compat_props_add(m->compat_props, pc_compat_5_0, pc_compat_5_0_len);
642 m->auto_enable_numa_with_memdev = false;
643 }
644
645 DEFINE_I440FX_MACHINE(5, 0);
646
647 static void pc_i440fx_machine_4_2_options(MachineClass *m)
648 {
649 pc_i440fx_machine_5_0_options(m);
650 compat_props_add(m->compat_props, hw_compat_4_2, hw_compat_4_2_len);
651 compat_props_add(m->compat_props, pc_compat_4_2, pc_compat_4_2_len);
652 }
653
654 DEFINE_I440FX_MACHINE(4, 2);
655
656 static void pc_i440fx_machine_4_1_options(MachineClass *m)
657 {
658 pc_i440fx_machine_4_2_options(m);
659 compat_props_add(m->compat_props, hw_compat_4_1, hw_compat_4_1_len);
660 compat_props_add(m->compat_props, pc_compat_4_1, pc_compat_4_1_len);
661 }
662
663 DEFINE_I440FX_MACHINE(4, 1);
664
665 #ifdef CONFIG_XEN
666 static void xenfv_machine_4_2_options(MachineClass *m)
667 {
668 pc_i440fx_machine_4_2_options(m);
669 m->desc = "Xen Fully-virtualized PC";
670 m->alias = "xenfv";
671 m->max_cpus = HVM_MAX_VCPUS;
672 m->default_machine_opts = "accel=xen,suppress-vmdesc=on";
673 }
674
675 DEFINE_PC_MACHINE(xenfv_4_2, "xenfv-4.2", pc_xen_hvm_init,
676 xenfv_machine_4_2_options);
677 #endif