| 1 | /* |
| 2 | * Copyright (c) 2003-2004 Fabrice Bellard |
| 3 | * Copyright (c) 2019, 2024 Red Hat, Inc. |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 6 | * of this software and associated documentation files (the "Software"), to deal |
| 7 | * in the Software without restriction, including without limitation the rights |
| 8 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 9 | * copies of the Software, and to permit persons to whom the Software is |
| 10 | * furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be included in |
| 13 | * all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 21 | * THE SOFTWARE. |
| 22 | */ |
| 23 | #include "qemu/osdep.h" |
| 24 | #include "system/whpx.h" |
| 25 | #include "system/mshv.h" |
| 26 | #include "system/cpu-timers.h" |
| 27 | #include "trace.h" |
| 28 | |
| 29 | #include "hw/i386/x86.h" |
| 30 | #include "target/i386/cpu.h" |
| 31 | #include "hw/intc/i8259.h" |
| 32 | #include "hw/core/irq.h" |
| 33 | #include "system/kvm.h" |
| 34 | |
| 35 | /* TSC handling */ |
| 36 | uint64_t cpu_get_tsc(CPUX86State *env) |
| 37 | { |
| 38 | return cpus_get_elapsed_ticks(); |
| 39 | } |
| 40 | |
| 41 | /* IRQ handling */ |
| 42 | static void pic_irq_request(void *opaque, int irq, int level) |
| 43 | { |
| 44 | CPUState *cs = first_cpu; |
| 45 | X86CPU *cpu = X86_CPU(cs); |
| 46 | |
| 47 | trace_x86_pic_interrupt(irq, level); |
| 48 | |
| 49 | if (mshv_irqchip_in_kernel()) { |
| 50 | return; |
| 51 | } |
| 52 | |
| 53 | if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() && |
| 54 | !whpx_irqchip_in_kernel()) { |
| 55 | CPU_FOREACH(cs) { |
| 56 | cpu = X86_CPU(cs); |
| 57 | if (apic_accept_pic_intr(cpu->apic_state)) { |
| 58 | apic_deliver_pic_intr(cpu->apic_state, level); |
| 59 | } |
| 60 | } |
| 61 | } else { |
| 62 | if (level) { |
| 63 | cpu_interrupt(cs, CPU_INTERRUPT_HARD); |
| 64 | } else { |
| 65 | cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); |
| 66 | } |
| 67 | } |
| 68 | } |
| 69 | |
| 70 | qemu_irq x86_allocate_cpu_irq(void) |
| 71 | { |
| 72 | return qemu_allocate_irq(pic_irq_request, NULL, 0); |
| 73 | } |
| 74 | |
| 75 | int cpu_get_pic_interrupt(CPUX86State *env) |
| 76 | { |
| 77 | X86CPU *cpu = env_archcpu(env); |
| 78 | int intno; |
| 79 | |
| 80 | if (!kvm_irqchip_in_kernel() && !whpx_irqchip_in_kernel()) { |
| 81 | intno = apic_get_interrupt(cpu->apic_state); |
| 82 | if (intno >= 0) { |
| 83 | return intno; |
| 84 | } |
| 85 | /* read the irq from the PIC */ |
| 86 | if (!apic_accept_pic_intr(cpu->apic_state)) { |
| 87 | return -1; |
| 88 | } |
| 89 | } |
| 90 | |
| 91 | intno = pic_read_irq(isa_pic); |
| 92 | return intno; |
| 93 | } |
| 94 | |
| 95 | APICCommonState *cpu_get_current_apic(void) |
| 96 | { |
| 97 | if (current_cpu) { |
| 98 | X86CPU *cpu = X86_CPU(current_cpu); |
| 99 | return cpu->apic_state; |
| 100 | } else { |
| 101 | return NULL; |
| 102 | } |
| 103 | } |