| 1 | #ifndef HW_IDE_INTERNAL_H |
| 2 | #define HW_IDE_INTERNAL_H |
| 3 | |
| 4 | /* |
| 5 | * QEMU IDE Emulation -- internal header file |
| 6 | * only files in hw/ide/ are supposed to include this file. |
| 7 | * non-internal declarations are in hw/include/ide-*.h |
| 8 | */ |
| 9 | |
| 10 | #include "hw/ide/ide-bus.h" |
| 11 | |
| 12 | /* debug IDE devices */ |
| 13 | #define USE_DMA_CDROM |
| 14 | |
| 15 | /* Device/Head ("select") Register */ |
| 16 | #define ATA_DEV_SELECT 0x10 |
| 17 | /* ATA1,3: Defined as '1'. |
| 18 | * ATA2: Reserved. |
| 19 | * ATA3-7: obsolete. */ |
| 20 | #define ATA_DEV_ALWAYS_ON 0xA0 |
| 21 | #define ATA_DEV_LBA 0x40 |
| 22 | #define ATA_DEV_LBA_MSB 0x0F /* LBA 24:27 */ |
| 23 | #define ATA_DEV_HS 0x0F /* HS 3:0 */ |
| 24 | |
| 25 | |
| 26 | /* Bits of HD_STATUS */ |
| 27 | #define ERR_STAT 0x01 |
| 28 | #define INDEX_STAT 0x02 |
| 29 | #define ECC_STAT 0x04 /* Corrected error */ |
| 30 | #define DRQ_STAT 0x08 |
| 31 | #define SEEK_STAT 0x10 |
| 32 | #define SRV_STAT 0x10 |
| 33 | #define WRERR_STAT 0x20 |
| 34 | #define READY_STAT 0x40 |
| 35 | #define BUSY_STAT 0x80 |
| 36 | |
| 37 | /* Bits for HD_ERROR */ |
| 38 | #define MARK_ERR 0x01 /* Bad address mark */ |
| 39 | #define TRK0_ERR 0x02 /* couldn't find track 0 */ |
| 40 | #define ABRT_ERR 0x04 /* Command aborted */ |
| 41 | #define MCR_ERR 0x08 /* media change request */ |
| 42 | #define ID_ERR 0x10 /* ID field not found */ |
| 43 | #define MC_ERR 0x20 /* media changed */ |
| 44 | #define ECC_ERR 0x40 /* Uncorrectable ECC error */ |
| 45 | #define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */ |
| 46 | #define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */ |
| 47 | |
| 48 | /* Bits of HD_NSECTOR */ |
| 49 | #define CD 0x01 |
| 50 | #define IO 0x02 |
| 51 | #define REL 0x04 |
| 52 | #define TAG_MASK 0xf8 |
| 53 | |
| 54 | /* Bits of Device Control register */ |
| 55 | #define IDE_CTRL_HOB 0x80 |
| 56 | #define IDE_CTRL_RESET 0x04 |
| 57 | #define IDE_CTRL_DISABLE_IRQ 0x02 |
| 58 | |
| 59 | /* ACS-2 T13/2015-D Table B.2 Command codes */ |
| 60 | #define WIN_NOP 0x00 |
| 61 | /* reserved 0x01..0x02 */ |
| 62 | #define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */ |
| 63 | /* reserved 0x04..0x05 */ |
| 64 | #define WIN_DSM 0x06 |
| 65 | /* reserved 0x07 */ |
| 66 | #define WIN_DEVICE_RESET 0x08 |
| 67 | /* reserved 0x09..0x0a */ |
| 68 | /* REQUEST SENSE DATA EXT 0x0B */ |
| 69 | /* reserved 0x0C..0x0F */ |
| 70 | #define WIN_RECAL 0x10 /* obsolete since ATA4 */ |
| 71 | /* obsolete since ATA3, retired in ATA4 0x11..0x1F */ |
| 72 | #define WIN_READ 0x20 /* 28-Bit */ |
| 73 | #define WIN_READ_ONCE 0x21 /* 28-Bit w/o retries, obsolete since ATA5 */ |
| 74 | /* obsolete since ATA4 0x22..0x23 */ |
| 75 | #define WIN_READ_EXT 0x24 /* 48-Bit */ |
| 76 | #define WIN_READDMA_EXT 0x25 /* 48-Bit */ |
| 77 | #define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit, obsolete since ACS2 */ |
| 78 | #define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */ |
| 79 | /* reserved 0x28 */ |
| 80 | #define WIN_MULTREAD_EXT 0x29 /* 48-Bit */ |
| 81 | /* READ STREAM DMA EXT 0x2A */ |
| 82 | /* READ STREAM EXT 0x2B */ |
| 83 | /* reserved 0x2C..0x2E */ |
| 84 | /* READ LOG EXT 0x2F */ |
| 85 | #define WIN_WRITE 0x30 /* 28-Bit */ |
| 86 | #define WIN_WRITE_ONCE 0x31 /* 28-Bit w/o retries, obsolete since ATA5 */ |
| 87 | /* obsolete since ATA4 0x32..0x33 */ |
| 88 | #define WIN_WRITE_EXT 0x34 /* 48-Bit */ |
| 89 | #define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */ |
| 90 | #define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */ |
| 91 | #define WIN_SET_MAX_EXT 0x37 /* 48-Bit, obsolete since ACS2 */ |
| 92 | #define WIN_SET_MAX_EXT 0x37 /* 48-Bit */ |
| 93 | #define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */ |
| 94 | #define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */ |
| 95 | /* WRITE STREAM DMA EXT 0x3A */ |
| 96 | /* WRITE STREAM EXT 0x3B */ |
| 97 | #define WIN_WRITE_VERIFY 0x3C /* 28-Bit, obsolete since ATA4 */ |
| 98 | /* WRITE DMA FUA EXT 0x3D */ |
| 99 | /* obsolete since ACS2 0x3E */ |
| 100 | /* WRITE LOG EXT 0x3F */ |
| 101 | #define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */ |
| 102 | #define WIN_VERIFY_ONCE 0x41 /* 28-Bit - w/o retries, obsolete since ATA5 */ |
| 103 | #define WIN_VERIFY_EXT 0x42 /* 48-Bit */ |
| 104 | /* reserved 0x43..0x44 */ |
| 105 | /* WRITE UNCORRECTABLE EXT 0x45 */ |
| 106 | /* reserved 0x46 */ |
| 107 | /* READ LOG DMA EXT 0x47 */ |
| 108 | /* reserved 0x48..0x4F */ |
| 109 | /* obsolete since ATA4 0x50 */ |
| 110 | /* CONFIGURE STREAM 0x51 */ |
| 111 | /* reserved 0x52..0x56 */ |
| 112 | /* WRITE LOG DMA EXT 0x57 */ |
| 113 | /* reserved 0x58..0x5A */ |
| 114 | /* TRUSTED NON DATA 0x5B */ |
| 115 | /* TRUSTED RECEIVE 0x5C */ |
| 116 | /* TRUSTED RECEIVE DMA 0x5D */ |
| 117 | /* TRUSTED SEND 0x5E */ |
| 118 | /* TRUSTED SEND DMA 0x5F */ |
| 119 | /* READ FPDMA QUEUED 0x60 */ |
| 120 | /* WRITE FPDMA QUEUED 0x61 */ |
| 121 | /* reserved 0x62->0x6F */ |
| 122 | #define WIN_SEEK 0x70 /* obsolete since ATA7 */ |
| 123 | /* reserved 0x71-0x7F */ |
| 124 | /* vendor specific 0x80-0x86 */ |
| 125 | #define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */ |
| 126 | /* vendor specific 0x88-0x8F */ |
| 127 | #define WIN_DIAGNOSE 0x90 |
| 128 | #define WIN_SPECIFY 0x91 /* set drive geometry translation, obsolete since ATA6 */ |
| 129 | #define WIN_DOWNLOAD_MICROCODE 0x92 |
| 130 | /* DOWNLOAD MICROCODE DMA 0x93 */ |
| 131 | #define WIN_STANDBYNOW2 0x94 /* retired in ATA4 */ |
| 132 | #define WIN_IDLEIMMEDIATE2 0x95 /* force drive to become "ready", retired in ATA4 */ |
| 133 | #define WIN_STANDBY2 0x96 /* retired in ATA4 */ |
| 134 | #define WIN_SETIDLE2 0x97 /* retired in ATA4 */ |
| 135 | #define WIN_CHECKPOWERMODE2 0x98 /* retired in ATA4 */ |
| 136 | #define WIN_SLEEPNOW2 0x99 /* retired in ATA4 */ |
| 137 | /* vendor specific 0x9A */ |
| 138 | /* reserved 0x9B..0x9F */ |
| 139 | #define WIN_PACKETCMD 0xA0 /* Send a packet command. */ |
| 140 | #define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */ |
| 141 | #define WIN_QUEUED_SERVICE 0xA2 /* obsolete since ACS2 */ |
| 142 | /* reserved 0xA3..0xAF */ |
| 143 | #define WIN_SMART 0xB0 /* self-monitoring and reporting */ |
| 144 | /* Device Configuration Overlay 0xB1 */ |
| 145 | /* reserved 0xB2..0xB3 */ |
| 146 | /* Sanitize Device 0xB4 */ |
| 147 | /* reserved 0xB5 */ |
| 148 | /* NV Cache 0xB6 */ |
| 149 | /* reserved for CFA 0xB7..0xBB */ |
| 150 | #define CFA_ACCESS_METADATA_STORAGE 0xB8 |
| 151 | /* reserved 0xBC..0xBF */ |
| 152 | #define CFA_ERASE_SECTORS 0xC0 /* microdrives implement as NOP */ |
| 153 | /* vendor specific 0xC1..0xC3 */ |
| 154 | #define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/ |
| 155 | #define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */ |
| 156 | #define WIN_SETMULT 0xC6 /* enable/disable multiple mode */ |
| 157 | #define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers, obsolete since ACS2 */ |
| 158 | #define WIN_READDMA 0xC8 /* read sectors using DMA transfers */ |
| 159 | #define WIN_READDMA_ONCE 0xC9 /* 28-Bit - w/o retries, obsolete since ATA5 */ |
| 160 | #define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */ |
| 161 | #define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - w/o retries, obsolete since ATA5 */ |
| 162 | #define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers, obsolete since ACS2 */ |
| 163 | #define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */ |
| 164 | /* WRITE MULTIPLE FUA EXT 0xCE */ |
| 165 | /* reserved 0xCF..0xDO */ |
| 166 | /* CHECK MEDIA CARD TYPE 0xD1 */ |
| 167 | /* reserved for media card pass through 0xD2..0xD4 */ |
| 168 | /* reserved 0xD5..0xD9 */ |
| 169 | #define WIN_GETMEDIASTATUS 0xDA /* obsolete since ATA8 */ |
| 170 | /* obsolete since ATA3, retired in ATA4 0xDB..0xDD */ |
| 171 | #define WIN_DOORLOCK 0xDE /* lock door on removable drives, obsolete since ATA8 */ |
| 172 | #define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives, obsolete since ATA8 */ |
| 173 | #define WIN_STANDBYNOW1 0xE0 |
| 174 | #define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */ |
| 175 | #define WIN_STANDBY 0xE2 /* Set device in Standby Mode */ |
| 176 | #define WIN_SETIDLE1 0xE3 |
| 177 | #define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */ |
| 178 | #define WIN_CHECKPOWERMODE1 0xE5 |
| 179 | #define WIN_SLEEPNOW1 0xE6 |
| 180 | #define WIN_FLUSH_CACHE 0xE7 |
| 181 | #define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */ |
| 182 | /* READ BUFFER DMA 0xE9 */ |
| 183 | #define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */ |
| 184 | /* WRITE BUFFER DMA 0xEB */ |
| 185 | #define WIN_IDENTIFY 0xEC /* ask drive to identify itself */ |
| 186 | #define WIN_MEDIAEJECT 0xED /* obsolete since ATA8 */ |
| 187 | /* obsolete since ATA4 0xEE */ |
| 188 | #define WIN_SETFEATURES 0xEF /* set special drive features */ |
| 189 | #define IBM_SENSE_CONDITION 0xF0 /* measure disk temperature, vendor specific */ |
| 190 | #define WIN_SECURITY_SET_PASS 0xF1 |
| 191 | #define WIN_SECURITY_UNLOCK 0xF2 |
| 192 | #define WIN_SECURITY_ERASE_PREPARE 0xF3 |
| 193 | #define WIN_SECURITY_ERASE_UNIT 0xF4 |
| 194 | #define WIN_SECURITY_FREEZE_LOCK 0xF5 |
| 195 | #define CFA_WEAR_LEVEL 0xF5 /* microdrives implement as NOP; not specified in T13! */ |
| 196 | #define WIN_SECURITY_DISABLE 0xF6 |
| 197 | /* vendor specific 0xF7 */ |
| 198 | #define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */ |
| 199 | #define WIN_SET_MAX 0xF9 |
| 200 | /* vendor specific 0xFA..0xFF */ |
| 201 | |
| 202 | /* set to 1 set disable mult support */ |
| 203 | #define MAX_MULT_SECTORS 16 |
| 204 | |
| 205 | #define IDE_DMA_BUF_SECTORS 256 |
| 206 | |
| 207 | /* feature values for Data Set Management */ |
| 208 | #define DSM_TRIM 0x01 |
| 209 | |
| 210 | #if (IDE_DMA_BUF_SECTORS < MAX_MULT_SECTORS) |
| 211 | #error "IDE_DMA_BUF_SECTORS must be bigger or equal to MAX_MULT_SECTORS" |
| 212 | #endif |
| 213 | |
| 214 | /* ATAPI defines */ |
| 215 | |
| 216 | #define ATAPI_PACKET_SIZE 12 |
| 217 | |
| 218 | /* The generic packet command opcodes for CD/DVD Logical Units, |
| 219 | * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */ |
| 220 | #define GPCMD_BLANK 0xa1 |
| 221 | #define GPCMD_CLOSE_TRACK 0x5b |
| 222 | #define GPCMD_FLUSH_CACHE 0x35 |
| 223 | #define GPCMD_FORMAT_UNIT 0x04 |
| 224 | #define GPCMD_GET_CONFIGURATION 0x46 |
| 225 | #define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a |
| 226 | #define GPCMD_GET_PERFORMANCE 0xac |
| 227 | #define GPCMD_INQUIRY 0x12 |
| 228 | #define GPCMD_LOAD_UNLOAD 0xa6 |
| 229 | #define GPCMD_MECHANISM_STATUS 0xbd |
| 230 | #define GPCMD_MODE_SELECT_10 0x55 |
| 231 | #define GPCMD_MODE_SENSE_10 0x5a |
| 232 | #define GPCMD_PAUSE_RESUME 0x4b |
| 233 | #define GPCMD_PLAY_AUDIO_10 0x45 |
| 234 | #define GPCMD_PLAY_AUDIO_MSF 0x47 |
| 235 | #define GPCMD_PLAY_AUDIO_TI 0x48 |
| 236 | #define GPCMD_PLAY_CD 0xbc |
| 237 | #define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e |
| 238 | #define GPCMD_READ_10 0x28 |
| 239 | #define GPCMD_READ_12 0xa8 |
| 240 | #define GPCMD_READ_CDVD_CAPACITY 0x25 |
| 241 | #define GPCMD_READ_CD 0xbe |
| 242 | #define GPCMD_READ_CD_MSF 0xb9 |
| 243 | #define GPCMD_READ_DISC_INFO 0x51 |
| 244 | #define GPCMD_READ_DVD_STRUCTURE 0xad |
| 245 | #define GPCMD_READ_FORMAT_CAPACITIES 0x23 |
| 246 | #define GPCMD_READ_HEADER 0x44 |
| 247 | #define GPCMD_READ_TRACK_RZONE_INFO 0x52 |
| 248 | #define GPCMD_READ_SUBCHANNEL 0x42 |
| 249 | #define GPCMD_READ_TOC_PMA_ATIP 0x43 |
| 250 | #define GPCMD_REPAIR_RZONE_TRACK 0x58 |
| 251 | #define GPCMD_REPORT_KEY 0xa4 |
| 252 | #define GPCMD_REQUEST_SENSE 0x03 |
| 253 | #define GPCMD_RESERVE_RZONE_TRACK 0x53 |
| 254 | #define GPCMD_SCAN 0xba |
| 255 | #define GPCMD_SEEK 0x2b |
| 256 | #define GPCMD_SEND_DVD_STRUCTURE 0xad |
| 257 | #define GPCMD_SEND_EVENT 0xa2 |
| 258 | #define GPCMD_SEND_KEY 0xa3 |
| 259 | #define GPCMD_SEND_OPC 0x54 |
| 260 | #define GPCMD_SET_READ_AHEAD 0xa7 |
| 261 | #define GPCMD_SET_STREAMING 0xb6 |
| 262 | #define GPCMD_START_STOP_UNIT 0x1b |
| 263 | #define GPCMD_STOP_PLAY_SCAN 0x4e |
| 264 | #define GPCMD_TEST_UNIT_READY 0x00 |
| 265 | #define GPCMD_VERIFY_10 0x2f |
| 266 | #define GPCMD_WRITE_10 0x2a |
| 267 | #define GPCMD_WRITE_AND_VERIFY_10 0x2e |
| 268 | /* This is listed as optional in ATAPI 2.6, but is (curiously) |
| 269 | * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji |
| 270 | * Table 377 as an MMC command for SCSi devices though... Most ATAPI |
| 271 | * drives support it. */ |
| 272 | #define GPCMD_SET_SPEED 0xbb |
| 273 | /* This seems to be a SCSI specific CD-ROM opcode |
| 274 | * to play data at track/index */ |
| 275 | #define GPCMD_PLAYAUDIO_TI 0x48 |
| 276 | /* |
| 277 | * From MS Media Status Notification Support Specification. For |
| 278 | * older drives only. |
| 279 | */ |
| 280 | #define GPCMD_GET_MEDIA_STATUS 0xda |
| 281 | #define GPCMD_MODE_SENSE_6 0x1a |
| 282 | |
| 283 | #define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */ |
| 284 | #define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */ |
| 285 | #define ATAPI_INT_REASON_REL 0x04 |
| 286 | #define ATAPI_INT_REASON_TAG 0xf8 |
| 287 | |
| 288 | /* same constants as bochs */ |
| 289 | #define ASC_NO_SEEK_COMPLETE 0x02 |
| 290 | #define ASC_ILLEGAL_OPCODE 0x20 |
| 291 | #define ASC_LOGICAL_BLOCK_OOR 0x21 |
| 292 | #define ASC_INV_FIELD_IN_CMD_PACKET 0x24 |
| 293 | #define ASC_MEDIUM_MAY_HAVE_CHANGED 0x28 |
| 294 | #define ASC_INCOMPATIBLE_FORMAT 0x30 |
| 295 | #define ASC_MEDIUM_NOT_PRESENT 0x3a |
| 296 | #define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39 |
| 297 | #define ASC_DATA_PHASE_ERROR 0x4b |
| 298 | #define ASC_MEDIA_REMOVAL_PREVENTED 0x53 |
| 299 | |
| 300 | #define CFA_NO_ERROR 0x00 |
| 301 | #define CFA_MISC_ERROR 0x09 |
| 302 | #define CFA_INVALID_COMMAND 0x20 |
| 303 | #define CFA_INVALID_ADDRESS 0x21 |
| 304 | #define CFA_ADDRESS_OVERFLOW 0x2f |
| 305 | |
| 306 | #define SMART_READ_DATA 0xd0 |
| 307 | #define SMART_READ_THRESH 0xd1 |
| 308 | #define SMART_ATTR_AUTOSAVE 0xd2 |
| 309 | #define SMART_SAVE_ATTR 0xd3 |
| 310 | #define SMART_EXECUTE_OFFLINE 0xd4 |
| 311 | #define SMART_READ_LOG 0xd5 |
| 312 | #define SMART_WRITE_LOG 0xd6 |
| 313 | #define SMART_ENABLE 0xd8 |
| 314 | #define SMART_DISABLE 0xd9 |
| 315 | #define SMART_STATUS 0xda |
| 316 | |
| 317 | extern const char *IDE_DMA_CMD_lookup[IDE_DMA__COUNT]; |
| 318 | |
| 319 | extern const MemoryRegionPortio ide_portio_list[]; |
| 320 | extern const MemoryRegionPortio ide_portio2_list[]; |
| 321 | |
| 322 | #define ide_cmd_is_read(s) \ |
| 323 | ((s)->dma_cmd == IDE_DMA_READ) |
| 324 | |
| 325 | typedef struct IDEBufferedRequest { |
| 326 | QLIST_ENTRY(IDEBufferedRequest) list; |
| 327 | QEMUIOVector qiov; |
| 328 | QEMUIOVector *original_qiov; |
| 329 | BlockCompletionFunc *original_cb; |
| 330 | void *original_opaque; |
| 331 | bool orphaned; |
| 332 | } IDEBufferedRequest; |
| 333 | |
| 334 | /* These are used for the error_status field of IDEBus */ |
| 335 | #define IDE_RETRY_MASK 0xf8 |
| 336 | #define IDE_RETRY_DMA 0x08 |
| 337 | #define IDE_RETRY_PIO 0x10 |
| 338 | #define IDE_RETRY_ATAPI 0x20 /* reused IDE_RETRY_READ bit */ |
| 339 | #define IDE_RETRY_READ 0x20 |
| 340 | #define IDE_RETRY_FLUSH 0x40 |
| 341 | #define IDE_RETRY_TRIM 0x80 |
| 342 | #define IDE_RETRY_HBA 0x100 |
| 343 | |
| 344 | #define IS_IDE_RETRY_DMA(_status) \ |
| 345 | ((_status) & IDE_RETRY_DMA) |
| 346 | |
| 347 | #define IS_IDE_RETRY_PIO(_status) \ |
| 348 | ((_status) & IDE_RETRY_PIO) |
| 349 | |
| 350 | /* |
| 351 | * The method of the IDE_RETRY_ATAPI determination is to use a previously |
| 352 | * impossible bit combination as a new status value. |
| 353 | */ |
| 354 | #define IS_IDE_RETRY_ATAPI(_status) \ |
| 355 | (((_status) & IDE_RETRY_MASK) == IDE_RETRY_ATAPI) |
| 356 | |
| 357 | static inline uint8_t ide_dma_cmd_to_retry(uint8_t dma_cmd) |
| 358 | { |
| 359 | switch (dma_cmd) { |
| 360 | case IDE_DMA_READ: |
| 361 | return IDE_RETRY_DMA | IDE_RETRY_READ; |
| 362 | case IDE_DMA_WRITE: |
| 363 | return IDE_RETRY_DMA; |
| 364 | case IDE_DMA_TRIM: |
| 365 | return IDE_RETRY_DMA | IDE_RETRY_TRIM; |
| 366 | case IDE_DMA_ATAPI: |
| 367 | return IDE_RETRY_ATAPI; |
| 368 | default: |
| 369 | break; |
| 370 | } |
| 371 | return 0; |
| 372 | } |
| 373 | |
| 374 | static inline IDEState *ide_bus_active_if(IDEBus *bus) |
| 375 | { |
| 376 | return bus->ifs + bus->unit; |
| 377 | } |
| 378 | |
| 379 | /* hw/ide/core.c */ |
| 380 | extern const VMStateDescription vmstate_ide_bus; |
| 381 | |
| 382 | #define VMSTATE_IDE_BUS(_field, _state) \ |
| 383 | VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_bus, IDEBus) |
| 384 | |
| 385 | #define VMSTATE_IDE_BUS_ARRAY(_field, _state, _num) \ |
| 386 | VMSTATE_STRUCT_ARRAY(_field, _state, _num, 1, vmstate_ide_bus, IDEBus) |
| 387 | |
| 388 | extern const VMStateDescription vmstate_ide_drive; |
| 389 | |
| 390 | #define VMSTATE_IDE_DRIVES(_field, _state) \ |
| 391 | VMSTATE_STRUCT_ARRAY(_field, _state, 2, 3, vmstate_ide_drive, IDEState) |
| 392 | |
| 393 | #define VMSTATE_IDE_DRIVE(_field, _state) \ |
| 394 | VMSTATE_STRUCT(_field, _state, 1, vmstate_ide_drive, IDEState) |
| 395 | |
| 396 | typedef enum { |
| 397 | IDE_RESET_HARDWARE, /* power on, hardware reset or COMRESET, ATA-5 9.1 */ |
| 398 | IDE_RESET_SOFTWARE, /* SRST or DEVICE RESET, ATA-5 9.2 */ |
| 399 | } IDEResetKind; |
| 400 | |
| 401 | void ide_bus_reset(IDEBus *bus, IDEResetKind kind); |
| 402 | int64_t ide_get_sector(IDEState *s); |
| 403 | void ide_set_sector(IDEState *s, int64_t sector_num); |
| 404 | |
| 405 | void ide_start_dma(IDEState *s, BlockCompletionFunc *cb); |
| 406 | void ide_dma_buf_commit(IDEState *s, uint32_t tx_bytes); |
| 407 | void ide_dma_error(IDEState *s); |
| 408 | void ide_abort_command(IDEState *s); |
| 409 | |
| 410 | void ide_atapi_cmd_ok(IDEState *s); |
| 411 | void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc); |
| 412 | void ide_atapi_dma_restart(IDEState *s); |
| 413 | void ide_atapi_io_error(IDEState *s, int ret); |
| 414 | |
| 415 | void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val); |
| 416 | uint32_t ide_ioport_read(void *opaque, uint32_t addr1); |
| 417 | uint32_t ide_status_read(void *opaque, uint32_t addr); |
| 418 | void ide_ctrl_write(void *opaque, uint32_t addr, uint32_t val); |
| 419 | void ide_data_writew(void *opaque, uint32_t addr, uint32_t val); |
| 420 | uint32_t ide_data_readw(void *opaque, uint32_t addr); |
| 421 | void ide_data_writel(void *opaque, uint32_t addr, uint32_t val); |
| 422 | uint32_t ide_data_readl(void *opaque, uint32_t addr); |
| 423 | |
| 424 | int ide_init_drive(IDEState *s, IDEDevice *dev, IDEDriveKind kind, Error **errp); |
| 425 | void ide_exit(IDEState *s); |
| 426 | void ide_bus_init_output_irq(IDEBus *bus, qemu_irq irq_out); |
| 427 | int ide_init_ioport(IDEBus *bus, ISADevice *isa, int iobase, int iobase2); |
| 428 | void ide_bus_set_irq(IDEBus *bus); |
| 429 | void ide_bus_register_restart_cb(IDEBus *bus); |
| 430 | |
| 431 | void ide_bus_exec_cmd(IDEBus *bus, uint32_t val); |
| 432 | |
| 433 | void ide_transfer_start(IDEState *s, uint8_t *buf, int size, |
| 434 | EndTransferFunc *end_transfer_func); |
| 435 | bool ide_transfer_start_norecurse(IDEState *s, uint8_t *buf, int size, |
| 436 | EndTransferFunc *end_transfer_func); |
| 437 | void ide_transfer_stop(IDEState *s); |
| 438 | void ide_set_inactive(IDEState *s, bool more); |
| 439 | BlockAIOCB *ide_issue_trim( |
| 440 | int64_t offset, QEMUIOVector *qiov, |
| 441 | BlockCompletionFunc *cb, void *cb_opaque, void *opaque); |
| 442 | BlockAIOCB *ide_buffered_readv(IDEState *s, int64_t sector_num, |
| 443 | QEMUIOVector *iov, int nb_sectors, |
| 444 | BlockCompletionFunc *cb, void *opaque); |
| 445 | void ide_cancel_dma_sync(IDEState *s); |
| 446 | |
| 447 | /* hw/ide/atapi.c */ |
| 448 | void ide_atapi_cmd(IDEState *s); |
| 449 | void ide_atapi_cmd_reply_end(IDEState *s); |
| 450 | |
| 451 | int ide_handle_rw_error(IDEState *s, int error, int op); |
| 452 | |
| 453 | #endif /* HW_IDE_INTERNAL_H */ |