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1 /*
2 * KVM in-kernel OpenPIC
3 *
4 * Copyright 2013 Freescale Semiconductor, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25 #include "qemu/osdep.h"
26 #include "qapi/error.h"
27 #include <sys/ioctl.h>
28 #include "hw/ppc/openpic.h"
29 #include "hw/ppc/openpic_kvm.h"
30 #include "hw/pci/msi.h"
31 #include "hw/core/qdev-properties.h"
32 #include "hw/core/sysbus.h"
33 #include "system/kvm.h"
34 #include "qemu/log.h"
35 #include "qemu/module.h"
36 #include "qom/object.h"
37
38 #define GCR_RESET 0x80000000
39
40 OBJECT_DECLARE_SIMPLE_TYPE(KVMOpenPICState, KVM_OPENPIC)
41
42 struct KVMOpenPICState {
43 /*< private >*/
44 SysBusDevice parent_obj;
45 /*< public >*/
46
47 MemoryRegion mem;
48 MemoryListener mem_listener;
49 uint32_t fd;
50 uint32_t model;
51 hwaddr mapped;
52 NotifierWithReturn vmfd_change_notifier;
53 };
54
55 static void kvm_openpic_set_irq(void *opaque, int n_IRQ, int level)
56 {
57 kvm_set_irq(kvm_state, n_IRQ, level);
58 }
59
60 static void kvm_openpic_write(void *opaque, hwaddr addr, uint64_t val,
61 unsigned size)
62 {
63 KVMOpenPICState *opp = opaque;
64 struct kvm_device_attr attr;
65 uint32_t val32 = val;
66 int ret;
67
68 attr.group = KVM_DEV_MPIC_GRP_REGISTER;
69 attr.attr = addr;
70 attr.addr = (uint64_t)(unsigned long)&val32;
71
72 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
73 if (ret < 0) {
74 qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__,
75 strerror(errno), attr.attr);
76 }
77 }
78
79 static void kvm_openpic_reset(DeviceState *d)
80 {
81 KVMOpenPICState *opp = KVM_OPENPIC(d);
82
83 /* Trigger the GCR.RESET bit to reset the PIC */
84 kvm_openpic_write(opp, 0x1020, GCR_RESET, sizeof(uint32_t));
85 }
86
87 static uint64_t kvm_openpic_read(void *opaque, hwaddr addr, unsigned size)
88 {
89 KVMOpenPICState *opp = opaque;
90 struct kvm_device_attr attr;
91 uint32_t val = 0xdeadbeef;
92 int ret;
93
94 attr.group = KVM_DEV_MPIC_GRP_REGISTER;
95 attr.attr = addr;
96 attr.addr = (uint64_t)(unsigned long)&val;
97
98 ret = ioctl(opp->fd, KVM_GET_DEVICE_ATTR, &attr);
99 if (ret < 0) {
100 qemu_log_mask(LOG_UNIMP, "%s: %s %" PRIx64 "\n", __func__,
101 strerror(errno), attr.attr);
102 return 0;
103 }
104
105 return val;
106 }
107
108 static const MemoryRegionOps kvm_openpic_mem_ops = {
109 .write = kvm_openpic_write,
110 .read = kvm_openpic_read,
111 .endianness = DEVICE_BIG_ENDIAN,
112 .impl = {
113 .min_access_size = 4,
114 .max_access_size = 4,
115 },
116 };
117
118 static int kvm_openpic_setup(KVMOpenPICState *opp, Error **errp)
119 {
120 int kvm_openpic_model;
121 struct kvm_create_device cd = {0};
122 KVMState *s = kvm_state;
123 int ret;
124
125 switch (opp->model) {
126 case OPENPIC_MODEL_FSL_MPIC_20:
127 kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_20;
128 break;
129
130 case OPENPIC_MODEL_FSL_MPIC_42:
131 kvm_openpic_model = KVM_DEV_TYPE_FSL_MPIC_42;
132 break;
133
134 default:
135 error_setg(errp, "Unsupported OpenPIC model %" PRIu32, opp->model);
136 return -1;
137 }
138
139 cd.type = kvm_openpic_model;
140 ret = kvm_vm_ioctl(s, KVM_CREATE_DEVICE, &cd);
141 if (ret < 0) {
142 error_setg(errp, "Can't create device %d: %s",
143 cd.type, strerror(errno));
144 return -1;
145 }
146 opp->fd = cd.fd;
147
148 return 0;
149 }
150
151 static int kvm_openpic_handle_vmfd_change(NotifierWithReturn *notifier,
152 void *data, Error **errp)
153 {
154 KVMOpenPICState *opp = container_of(notifier, KVMOpenPICState,
155 vmfd_change_notifier);
156 uint64_t reg_base;
157 struct kvm_device_attr attr;
158 CPUState *cs;
159 int ret;
160
161 /* we are not interested in pre vmfd change notification */
162 if (((VmfdChangeNotifier *)data)->pre) {
163 return 0;
164 }
165
166 /* close the old descriptor */
167 close(opp->fd);
168
169 if (kvm_openpic_setup(opp, errp) < 0) {
170 return -1;
171 }
172
173 if (!opp->mapped) {
174 return 0;
175 }
176
177 reg_base = opp->mapped;
178 attr.group = KVM_DEV_MPIC_GRP_MISC;
179 attr.attr = KVM_DEV_MPIC_BASE_ADDR;
180 attr.addr = (uint64_t)(unsigned long)&reg_base;
181
182 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
183 if (ret < 0) {
184 error_setg(errp, "%s: %s %" PRIx64, __func__,
185 strerror(errno), reg_base);
186 return -1;
187 }
188
189 CPU_FOREACH(cs) {
190 ret = kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_MPIC, 0, opp->fd,
191 kvm_arch_vcpu_id(cs));
192 if (ret < 0) {
193 return ret;
194 }
195 }
196
197 return 0;
198 }
199
200 static void kvm_openpic_region_add(MemoryListener *listener,
201 MemoryRegionSection *section)
202 {
203 KVMOpenPICState *opp = container_of(listener, KVMOpenPICState,
204 mem_listener);
205 struct kvm_device_attr attr;
206 uint64_t reg_base;
207 int ret;
208
209 /* Ignore events on regions that are not us */
210 if (section->mr != &opp->mem) {
211 return;
212 }
213
214 if (opp->mapped) {
215 /*
216 * We can only map the MPIC once. Since we are already mapped,
217 * the best we can do is ignore new maps.
218 */
219 return;
220 }
221
222 reg_base = section->offset_within_address_space;
223 opp->mapped = reg_base;
224
225 attr.group = KVM_DEV_MPIC_GRP_MISC;
226 attr.attr = KVM_DEV_MPIC_BASE_ADDR;
227 attr.addr = (uint64_t)(unsigned long)&reg_base;
228
229 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
230 if (ret < 0) {
231 fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__,
232 strerror(errno), reg_base);
233 }
234 }
235
236 static void kvm_openpic_region_del(MemoryListener *listener,
237 MemoryRegionSection *section)
238 {
239 KVMOpenPICState *opp = container_of(listener, KVMOpenPICState,
240 mem_listener);
241 struct kvm_device_attr attr;
242 uint64_t reg_base = 0;
243 int ret;
244
245 /* Ignore events on regions that are not us */
246 if (section->mr != &opp->mem) {
247 return;
248 }
249
250 if (section->offset_within_address_space != opp->mapped) {
251 /*
252 * We can only map the MPIC once. This mapping was a secondary
253 * one that we couldn't fulfill. Ignore it.
254 */
255 return;
256 }
257 opp->mapped = 0;
258
259 attr.group = KVM_DEV_MPIC_GRP_MISC;
260 attr.attr = KVM_DEV_MPIC_BASE_ADDR;
261 attr.addr = (uint64_t)(unsigned long)&reg_base;
262
263 ret = ioctl(opp->fd, KVM_SET_DEVICE_ATTR, &attr);
264 if (ret < 0) {
265 fprintf(stderr, "%s: %s %" PRIx64 "\n", __func__,
266 strerror(errno), reg_base);
267 }
268 }
269
270 static void kvm_openpic_init(Object *obj)
271 {
272 KVMOpenPICState *opp = KVM_OPENPIC(obj);
273
274 memory_region_init_io(&opp->mem, OBJECT(opp), &kvm_openpic_mem_ops, opp,
275 "kvm-openpic", 0x40000);
276 }
277
278 static void kvm_openpic_realize(DeviceState *dev, Error **errp)
279 {
280 SysBusDevice *d = SYS_BUS_DEVICE(dev);
281 KVMOpenPICState *opp = KVM_OPENPIC(dev);
282 KVMState *s = kvm_state;
283 int i;
284
285 if (!kvm_check_extension(s, KVM_CAP_DEVICE_CTRL)) {
286 error_setg(errp, "Kernel is lacking Device Control API");
287 return;
288 }
289
290 kvm_openpic_setup(opp, errp);
291
292 sysbus_init_mmio(d, &opp->mem);
293 qdev_init_gpio_in(dev, kvm_openpic_set_irq, OPENPIC_MAX_IRQ);
294
295 opp->mem_listener.region_add = kvm_openpic_region_add;
296 opp->mem_listener.region_del = kvm_openpic_region_del;
297 opp->mem_listener.name = "openpic-kvm";
298 memory_listener_register(&opp->mem_listener, &address_space_memory);
299 opp->vmfd_change_notifier.notify =
300 kvm_openpic_handle_vmfd_change;
301 kvm_vmfd_add_change_notifier(&opp->vmfd_change_notifier);
302
303 /* indicate pic capabilities */
304 msi_nonbroken = true;
305 kvm_kernel_irqchip = true;
306 kvm_async_interrupts_allowed = true;
307
308 /* set up irq routing */
309 kvm_init_irq_routing(kvm_state);
310 for (i = 0; i < 256; ++i) {
311 kvm_irqchip_add_irq_route(kvm_state, i, 0, i);
312 }
313
314 kvm_msi_via_irqfd_allowed = true;
315 kvm_gsi_routing_allowed = true;
316
317 kvm_irqchip_commit_routes(s);
318 }
319
320 int kvm_openpic_connect_vcpu(DeviceState *d, CPUState *cs)
321 {
322 KVMOpenPICState *opp = KVM_OPENPIC(d);
323
324 return kvm_vcpu_enable_cap(cs, KVM_CAP_IRQ_MPIC, 0, opp->fd,
325 kvm_arch_vcpu_id(cs));
326 }
327
328 static const Property kvm_openpic_properties[] = {
329 DEFINE_PROP_UINT32("model", KVMOpenPICState, model,
330 OPENPIC_MODEL_FSL_MPIC_20),
331 };
332
333 static void kvm_openpic_class_init(ObjectClass *oc, const void *data)
334 {
335 DeviceClass *dc = DEVICE_CLASS(oc);
336
337 dc->realize = kvm_openpic_realize;
338 device_class_set_props(dc, kvm_openpic_properties);
339 device_class_set_legacy_reset(dc, kvm_openpic_reset);
340 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
341 }
342
343 static const TypeInfo kvm_openpic_info = {
344 .name = TYPE_KVM_OPENPIC,
345 .parent = TYPE_SYS_BUS_DEVICE,
346 .instance_size = sizeof(KVMOpenPICState),
347 .instance_init = kvm_openpic_init,
348 .class_init = kvm_openpic_class_init,
349 };
350
351 static void kvm_openpic_register_types(void)
352 {
353 type_register_static(&kvm_openpic_info);
354 }
355
356 type_init(kvm_openpic_register_types)