| 1 | /* |
| 2 | * QEMU Intel i82378 emulation (PCI to ISA bridge) |
| 3 | * |
| 4 | * Copyright (c) 2010-2011 Hervé Poussineau |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2.1 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 18 | */ |
| 19 | |
| 20 | #include "qemu/osdep.h" |
| 21 | #include "hw/pci/pci_device.h" |
| 22 | #include "hw/core/irq.h" |
| 23 | #include "hw/intc/i8259.h" |
| 24 | #include "hw/timer/i8254.h" |
| 25 | #include "migration/vmstate.h" |
| 26 | #include "hw/audio/pcspk.h" |
| 27 | #include "qom/object.h" |
| 28 | |
| 29 | #define TYPE_I82378 "i82378" |
| 30 | OBJECT_DECLARE_SIMPLE_TYPE(I82378State, I82378) |
| 31 | |
| 32 | struct I82378State { |
| 33 | PCIDevice parent_obj; |
| 34 | |
| 35 | qemu_irq cpu_intr; |
| 36 | qemu_irq *isa_irqs_in; |
| 37 | }; |
| 38 | |
| 39 | static const VMStateDescription vmstate_i82378 = { |
| 40 | .name = "pci-i82378", |
| 41 | .version_id = 0, |
| 42 | .minimum_version_id = 0, |
| 43 | .fields = (const VMStateField[]) { |
| 44 | VMSTATE_PCI_DEVICE(parent_obj, I82378State), |
| 45 | VMSTATE_END_OF_LIST() |
| 46 | }, |
| 47 | }; |
| 48 | |
| 49 | static void i82378_request_out0_irq(void *opaque, int irq, int level) |
| 50 | { |
| 51 | I82378State *s = opaque; |
| 52 | qemu_set_irq(s->cpu_intr, level); |
| 53 | } |
| 54 | |
| 55 | static void i82378_request_pic_irq(void *opaque, int irq, int level) |
| 56 | { |
| 57 | DeviceState *dev = opaque; |
| 58 | I82378State *s = I82378(dev); |
| 59 | |
| 60 | qemu_set_irq(s->isa_irqs_in[irq], level); |
| 61 | } |
| 62 | |
| 63 | static void i82378_realize(PCIDevice *pci, Error **errp) |
| 64 | { |
| 65 | DeviceState *dev = DEVICE(pci); |
| 66 | I82378State *s = I82378(dev); |
| 67 | uint8_t *pci_conf; |
| 68 | ISABus *isabus; |
| 69 | ISADevice *pit; |
| 70 | ISADevice *pcspk; |
| 71 | |
| 72 | pci_conf = pci->config; |
| 73 | pci_set_word(pci_conf + PCI_COMMAND, |
| 74 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); |
| 75 | pci_set_word(pci_conf + PCI_STATUS, |
| 76 | PCI_STATUS_DEVSEL_MEDIUM); |
| 77 | |
| 78 | pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */ |
| 79 | |
| 80 | isabus = isa_bus_new(dev, get_system_memory(), |
| 81 | pci_address_space_io(pci), errp); |
| 82 | if (!isabus) { |
| 83 | return; |
| 84 | } |
| 85 | |
| 86 | /* This device has: |
| 87 | 2 82C59 (irq) |
| 88 | 1 82C54 (pit) |
| 89 | 2 82C37 (dma) |
| 90 | NMI |
| 91 | Utility Bus Support Registers |
| 92 | |
| 93 | All devices accept byte access only, except timer |
| 94 | */ |
| 95 | |
| 96 | /* 2 82C59 (irq) */ |
| 97 | s->isa_irqs_in = i8259_init(isabus, |
| 98 | qemu_allocate_irq(i82378_request_out0_irq, |
| 99 | s, 0)); |
| 100 | isa_bus_register_input_irqs(isabus, s->isa_irqs_in); |
| 101 | |
| 102 | /* 1 82C54 (pit) */ |
| 103 | pit = i8254_pit_init(isabus, 0x40, 0, NULL); |
| 104 | |
| 105 | /* speaker */ |
| 106 | pcspk = isa_new(TYPE_PC_SPEAKER); |
| 107 | object_property_set_link(OBJECT(pcspk), "pit", OBJECT(pit), &error_fatal); |
| 108 | if (!isa_realize_and_unref(pcspk, isabus, errp)) { |
| 109 | return; |
| 110 | } |
| 111 | |
| 112 | /* 2 82C37 (dma) */ |
| 113 | isa_create_simple(isabus, "i82374"); |
| 114 | } |
| 115 | |
| 116 | static void i82378_init(Object *obj) |
| 117 | { |
| 118 | DeviceState *dev = DEVICE(obj); |
| 119 | I82378State *s = I82378(obj); |
| 120 | |
| 121 | qdev_init_gpio_out(dev, &s->cpu_intr, 1); |
| 122 | qdev_init_gpio_in(dev, i82378_request_pic_irq, 16); |
| 123 | } |
| 124 | |
| 125 | static void i82378_class_init(ObjectClass *klass, const void *data) |
| 126 | { |
| 127 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
| 128 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 129 | |
| 130 | k->realize = i82378_realize; |
| 131 | k->vendor_id = PCI_VENDOR_ID_INTEL; |
| 132 | k->device_id = PCI_DEVICE_ID_INTEL_82378; |
| 133 | k->revision = 0x03; |
| 134 | k->class_id = PCI_CLASS_BRIDGE_ISA; |
| 135 | dc->vmsd = &vmstate_i82378; |
| 136 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
| 137 | } |
| 138 | |
| 139 | static const TypeInfo i82378_type_info = { |
| 140 | .name = TYPE_I82378, |
| 141 | .parent = TYPE_PCI_DEVICE, |
| 142 | .instance_size = sizeof(I82378State), |
| 143 | .instance_init = i82378_init, |
| 144 | .class_init = i82378_class_init, |
| 145 | .interfaces = (const InterfaceInfo[]) { |
| 146 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, |
| 147 | { }, |
| 148 | }, |
| 149 | }; |
| 150 | |
| 151 | static void i82378_register_types(void) |
| 152 | { |
| 153 | type_register_static(&i82378_type_info); |
| 154 | } |
| 155 | |
| 156 | type_init(i82378_register_types) |