| 1 | /* |
| 2 | * Generic ISA Super I/O |
| 3 | * |
| 4 | * Copyright (c) 2010-2012 Herve Poussineau |
| 5 | * Copyright (c) 2011-2012 Andreas Färber |
| 6 | * Copyright (c) 2018 Philippe Mathieu-Daudé |
| 7 | * |
| 8 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 9 | * See the COPYING file in the top-level directory. |
| 10 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 11 | */ |
| 12 | |
| 13 | #include "qemu/osdep.h" |
| 14 | #include "qemu/error-report.h" |
| 15 | #include "qemu/module.h" |
| 16 | #include "qapi/error.h" |
| 17 | #include "system/blockdev.h" |
| 18 | #include "system/system.h" |
| 19 | #include "chardev/char.h" |
| 20 | #include "hw/char/parallel.h" |
| 21 | #include "hw/block/fdc.h" |
| 22 | #include "hw/isa/superio.h" |
| 23 | #include "hw/core/qdev-properties.h" |
| 24 | #include "hw/input/i8042.h" |
| 25 | #include "hw/char/parallel-isa.h" |
| 26 | #include "hw/char/serial-isa.h" |
| 27 | #include "trace.h" |
| 28 | |
| 29 | static void isa_superio_realize(DeviceState *dev, Error **errp) |
| 30 | { |
| 31 | ISASuperIODevice *sio = ISA_SUPERIO(dev); |
| 32 | ISASuperIOClass *k = ISA_SUPERIO_GET_CLASS(sio); |
| 33 | ISABus *bus = isa_bus_from_device(ISA_DEVICE(dev)); |
| 34 | ISADevice *isa; |
| 35 | DeviceState *d; |
| 36 | Chardev *chr; |
| 37 | DriveInfo *fd[MAX_FD]; |
| 38 | char *name; |
| 39 | int i; |
| 40 | |
| 41 | /* Parallel port */ |
| 42 | for (i = 0; i < k->parallel.count; i++) { |
| 43 | if (i >= ARRAY_SIZE(sio->parallel)) { |
| 44 | warn_report("superio: ignoring %td parallel controllers", |
| 45 | k->parallel.count - ARRAY_SIZE(sio->parallel)); |
| 46 | break; |
| 47 | } |
| 48 | if (!k->parallel.is_enabled || k->parallel.is_enabled(sio, i)) { |
| 49 | /* FIXME use a qdev chardev prop instead of parallel_hds[] */ |
| 50 | chr = parallel_hds[i]; |
| 51 | if (chr == NULL) { |
| 52 | name = g_strdup_printf("discarding-parallel%d", i); |
| 53 | chr = qemu_chr_new(name, "null", NULL); |
| 54 | } else { |
| 55 | name = g_strdup_printf("parallel%d", i); |
| 56 | } |
| 57 | isa = isa_new(TYPE_ISA_PARALLEL); |
| 58 | d = DEVICE(isa); |
| 59 | qdev_prop_set_uint32(d, "index", i); |
| 60 | if (k->parallel.get_iobase) { |
| 61 | qdev_prop_set_uint32(d, "iobase", |
| 62 | k->parallel.get_iobase(sio, i)); |
| 63 | } |
| 64 | if (k->parallel.get_irq) { |
| 65 | qdev_prop_set_uint32(d, "irq", k->parallel.get_irq(sio, i)); |
| 66 | } |
| 67 | qdev_prop_set_chr(d, "chardev", chr); |
| 68 | object_property_add_child(OBJECT(dev), name, OBJECT(isa)); |
| 69 | isa_realize_and_unref(isa, bus, &error_fatal); |
| 70 | sio->parallel[i] = isa; |
| 71 | trace_superio_create_parallel(i, |
| 72 | k->parallel.get_iobase ? |
| 73 | k->parallel.get_iobase(sio, i) : -1, |
| 74 | k->parallel.get_irq ? |
| 75 | k->parallel.get_irq(sio, i) : -1); |
| 76 | g_free(name); |
| 77 | } |
| 78 | } |
| 79 | |
| 80 | /* Serial */ |
| 81 | for (i = 0; i < k->serial.count; i++) { |
| 82 | if (i >= ARRAY_SIZE(sio->serial)) { |
| 83 | warn_report("superio: ignoring %td serial controllers", |
| 84 | k->serial.count - ARRAY_SIZE(sio->serial)); |
| 85 | break; |
| 86 | } |
| 87 | if (!k->serial.is_enabled || k->serial.is_enabled(sio, i)) { |
| 88 | /* FIXME use a qdev chardev prop instead of serial_hd() */ |
| 89 | chr = serial_hd(i); |
| 90 | if (chr == NULL) { |
| 91 | name = g_strdup_printf("discarding-serial%d", i); |
| 92 | chr = qemu_chr_new(name, "null", NULL); |
| 93 | } else { |
| 94 | name = g_strdup_printf("serial%d", i); |
| 95 | } |
| 96 | isa = isa_new(TYPE_ISA_SERIAL); |
| 97 | d = DEVICE(isa); |
| 98 | qdev_prop_set_uint32(d, "index", i); |
| 99 | if (k->serial.get_iobase) { |
| 100 | qdev_prop_set_uint32(d, "iobase", |
| 101 | k->serial.get_iobase(sio, i)); |
| 102 | } |
| 103 | if (k->serial.get_irq) { |
| 104 | qdev_prop_set_uint32(d, "irq", k->serial.get_irq(sio, i)); |
| 105 | } |
| 106 | qdev_prop_set_chr(d, "chardev", chr); |
| 107 | object_property_add_child(OBJECT(dev), name, OBJECT(isa)); |
| 108 | isa_realize_and_unref(isa, bus, &error_fatal); |
| 109 | sio->serial[i] = isa; |
| 110 | trace_superio_create_serial(i, |
| 111 | k->serial.get_iobase ? |
| 112 | k->serial.get_iobase(sio, i) : -1, |
| 113 | k->serial.get_irq ? |
| 114 | k->serial.get_irq(sio, i) : -1); |
| 115 | g_free(name); |
| 116 | } |
| 117 | } |
| 118 | |
| 119 | /* Floppy disc */ |
| 120 | assert(k->floppy.count <= 1); |
| 121 | if (k->floppy.count && |
| 122 | (!k->floppy.is_enabled || k->floppy.is_enabled(sio, 0))) { |
| 123 | isa = isa_new(TYPE_ISA_FDC); |
| 124 | d = DEVICE(isa); |
| 125 | if (k->floppy.get_iobase) { |
| 126 | qdev_prop_set_uint32(d, "iobase", k->floppy.get_iobase(sio, 0)); |
| 127 | } |
| 128 | if (k->floppy.get_irq) { |
| 129 | qdev_prop_set_uint32(d, "irq", k->floppy.get_irq(sio, 0)); |
| 130 | } |
| 131 | /* FIXME use a qdev drive property instead of drive_get() */ |
| 132 | for (i = 0; i < MAX_FD; i++) { |
| 133 | fd[i] = drive_get(IF_FLOPPY, 0, i); |
| 134 | } |
| 135 | object_property_add_child(OBJECT(sio), "isa-fdc", OBJECT(isa)); |
| 136 | isa_realize_and_unref(isa, bus, &error_fatal); |
| 137 | isa_fdc_init_drives(isa, fd); |
| 138 | sio->floppy = isa; |
| 139 | trace_superio_create_floppy(0, |
| 140 | k->floppy.get_iobase ? |
| 141 | k->floppy.get_iobase(sio, 0) : -1, |
| 142 | k->floppy.get_irq ? |
| 143 | k->floppy.get_irq(sio, 0) : -1); |
| 144 | } |
| 145 | |
| 146 | /* Keyboard, mouse */ |
| 147 | isa = isa_new(TYPE_I8042); |
| 148 | object_property_add_child(OBJECT(sio), TYPE_I8042, OBJECT(isa)); |
| 149 | isa_realize_and_unref(isa, bus, &error_fatal); |
| 150 | sio->kbc = isa; |
| 151 | |
| 152 | /* IDE */ |
| 153 | if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(sio, 0))) { |
| 154 | isa = isa_new("isa-ide"); |
| 155 | d = DEVICE(isa); |
| 156 | if (k->ide.get_iobase) { |
| 157 | qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(sio, 0)); |
| 158 | } |
| 159 | if (k->ide.get_iobase) { |
| 160 | qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(sio, 1)); |
| 161 | } |
| 162 | if (k->ide.get_irq) { |
| 163 | qdev_prop_set_uint32(d, "irq", k->ide.get_irq(sio, 0)); |
| 164 | } |
| 165 | object_property_add_child(OBJECT(sio), "isa-ide", OBJECT(isa)); |
| 166 | isa_realize_and_unref(isa, bus, &error_fatal); |
| 167 | sio->ide = isa; |
| 168 | trace_superio_create_ide(0, |
| 169 | k->ide.get_iobase ? |
| 170 | k->ide.get_iobase(sio, 0) : -1, |
| 171 | k->ide.get_irq ? |
| 172 | k->ide.get_irq(sio, 0) : -1); |
| 173 | } |
| 174 | } |
| 175 | |
| 176 | static void isa_superio_class_init(ObjectClass *oc, const void *data) |
| 177 | { |
| 178 | DeviceClass *dc = DEVICE_CLASS(oc); |
| 179 | |
| 180 | dc->realize = isa_superio_realize; |
| 181 | /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */ |
| 182 | dc->user_creatable = false; |
| 183 | } |
| 184 | |
| 185 | static const TypeInfo isa_superio_type_info = { |
| 186 | .name = TYPE_ISA_SUPERIO, |
| 187 | .parent = TYPE_ISA_DEVICE, |
| 188 | .abstract = true, |
| 189 | .class_size = sizeof(ISASuperIOClass), |
| 190 | .class_init = isa_superio_class_init, |
| 191 | .instance_size = sizeof(ISASuperIODevice), |
| 192 | }; |
| 193 | |
| 194 | static void isa_superio_register_types(void) |
| 195 | { |
| 196 | type_register_static(&isa_superio_type_info); |
| 197 | } |
| 198 | |
| 199 | type_init(isa_superio_register_types) |