| 1 | /* |
| 2 | * Model of Petalogix linux reference design targeting Xilinx Spartan ml605 |
| 3 | * board. |
| 4 | * |
| 5 | * Copyright (c) 2011 Michal Simek <monstr@monstr.eu> |
| 6 | * Copyright (c) 2011 PetaLogix |
| 7 | * Copyright (c) 2009 Edgar E. Iglesias. |
| 8 | * |
| 9 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 10 | * of this software and associated documentation files (the "Software"), to deal |
| 11 | * in the Software without restriction, including without limitation the rights |
| 12 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 13 | * copies of the Software, and to permit persons to whom the Software is |
| 14 | * furnished to do so, subject to the following conditions: |
| 15 | * |
| 16 | * The above copyright notice and this permission notice shall be included in |
| 17 | * all copies or substantial portions of the Software. |
| 18 | * |
| 19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 20 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 21 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 22 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 23 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 24 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 25 | * THE SOFTWARE. |
| 26 | */ |
| 27 | |
| 28 | #include "qemu/osdep.h" |
| 29 | #include "qemu/units.h" |
| 30 | #include "qapi/error.h" |
| 31 | #include "target/microblaze/cpu.h" |
| 32 | #include "hw/core/sysbus.h" |
| 33 | #include "net/net.h" |
| 34 | #include "hw/block/flash.h" |
| 35 | #include "system/system.h" |
| 36 | #include "hw/core/boards.h" |
| 37 | #include "hw/char/serial-mm.h" |
| 38 | #include "hw/core/qdev-properties.h" |
| 39 | #include "system/address-spaces.h" |
| 40 | #include "hw/ssi/ssi.h" |
| 41 | |
| 42 | #include "boot.h" |
| 43 | |
| 44 | #include "hw/core/stream.h" |
| 45 | |
| 46 | #define LMB_BRAM_SIZE (128 * KiB) |
| 47 | #define FLASH_SIZE (32 * MiB) |
| 48 | |
| 49 | #define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb" |
| 50 | |
| 51 | #define NUM_SPI_FLASHES 4 |
| 52 | |
| 53 | #define SPI_BASEADDR 0x40a00000 |
| 54 | #define MEMORY_BASEADDR 0x50000000 |
| 55 | #define FLASH_BASEADDR 0x86000000 |
| 56 | #define INTC_BASEADDR 0x81800000 |
| 57 | #define TIMER_BASEADDR 0x83c00000 |
| 58 | #define UART16550_BASEADDR 0x83e00000 |
| 59 | #define AXIENET_BASEADDR 0x82780000 |
| 60 | #define AXIDMA_BASEADDR 0x84600000 |
| 61 | |
| 62 | #define AXIDMA_IRQ1 0 |
| 63 | #define AXIDMA_IRQ0 1 |
| 64 | #define TIMER_IRQ 2 |
| 65 | #define AXIENET_IRQ 3 |
| 66 | #define SPI_IRQ 4 |
| 67 | #define UART16550_IRQ 5 |
| 68 | |
| 69 | static void |
| 70 | petalogix_ml605_init(MachineState *machine) |
| 71 | { |
| 72 | ram_addr_t ram_size = machine->ram_size; |
| 73 | MemoryRegion *address_space_mem = get_system_memory(); |
| 74 | DeviceState *dev, *dma, *eth0; |
| 75 | Object *ds, *cs; |
| 76 | MicroBlazeCPU *cpu; |
| 77 | SysBusDevice *busdev; |
| 78 | DriveInfo *dinfo; |
| 79 | int i; |
| 80 | MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1); |
| 81 | MemoryRegion *phys_ram = g_new(MemoryRegion, 1); |
| 82 | qemu_irq irq[32]; |
| 83 | |
| 84 | /* init CPUs */ |
| 85 | cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU)); |
| 86 | object_property_set_str(OBJECT(cpu), "version", "8.10.a", &error_abort); |
| 87 | /* Use FPU but don't use floating point conversion and square |
| 88 | * root instructions |
| 89 | */ |
| 90 | object_property_set_int(OBJECT(cpu), "use-fpu", 1, &error_abort); |
| 91 | object_property_set_bool(OBJECT(cpu), "dcache-writeback", true, |
| 92 | &error_abort); |
| 93 | object_property_set_bool(OBJECT(cpu), "little-endian", true, &error_abort); |
| 94 | qdev_realize(DEVICE(cpu), NULL, &error_abort); |
| 95 | |
| 96 | /* Attach emulated BRAM through the LMB. */ |
| 97 | memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram", |
| 98 | LMB_BRAM_SIZE, &error_fatal); |
| 99 | memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram); |
| 100 | |
| 101 | memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size, |
| 102 | &error_fatal); |
| 103 | memory_region_add_subregion(address_space_mem, MEMORY_BASEADDR, phys_ram); |
| 104 | |
| 105 | dinfo = drive_get(IF_PFLASH, 0, 0); |
| 106 | /* 5th parameter 2 means bank-width |
| 107 | * 10th parameter 0 means little-endian */ |
| 108 | pflash_cfi01_register(FLASH_BASEADDR, "petalogix_ml605.flash", FLASH_SIZE, |
| 109 | dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, |
| 110 | 64 * KiB, 2, 0x89, 0x18, 0x0000, 0x0, 0); |
| 111 | |
| 112 | |
| 113 | dev = qdev_new("xlnx.xps-intc"); |
| 114 | qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_LITTLE); |
| 115 | qdev_prop_set_uint32(dev, "kind-of-intr", 1 << TIMER_IRQ); |
| 116 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 117 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR); |
| 118 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, |
| 119 | qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ)); |
| 120 | for (i = 0; i < 32; i++) { |
| 121 | irq[i] = qdev_get_gpio_in(dev, i); |
| 122 | } |
| 123 | |
| 124 | serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2, |
| 125 | irq[UART16550_IRQ], 115200, serial_hd(0), |
| 126 | DEVICE_LITTLE_ENDIAN); |
| 127 | |
| 128 | /* 2 timers at irq 2 @ 100 Mhz. */ |
| 129 | dev = qdev_new("xlnx.xps-timer"); |
| 130 | qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_LITTLE); |
| 131 | qdev_prop_set_uint32(dev, "one-timer-only", 0); |
| 132 | qdev_prop_set_uint32(dev, "clock-frequency", 100 * 1000000); |
| 133 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
| 134 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR); |
| 135 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]); |
| 136 | |
| 137 | /* axi ethernet and dma initialization. */ |
| 138 | eth0 = qdev_new("xlnx.axi-ethernet"); |
| 139 | dma = qdev_new("xlnx.axi-dma"); |
| 140 | |
| 141 | /* FIXME: attach to the sysbus instead */ |
| 142 | object_property_add_child(qdev_get_machine(), "xilinx-eth", OBJECT(eth0)); |
| 143 | object_property_add_child(qdev_get_machine(), "xilinx-dma", OBJECT(dma)); |
| 144 | |
| 145 | ds = object_property_get_link(OBJECT(dma), |
| 146 | "axistream-connected-target", NULL); |
| 147 | cs = object_property_get_link(OBJECT(dma), |
| 148 | "axistream-control-connected-target", NULL); |
| 149 | qemu_configure_nic_device(eth0, true, NULL); |
| 150 | qdev_prop_set_uint32(eth0, "rxmem", 0x1000); |
| 151 | qdev_prop_set_uint32(eth0, "txmem", 0x1000); |
| 152 | object_property_set_link(OBJECT(eth0), "axistream-connected", ds, |
| 153 | &error_abort); |
| 154 | object_property_set_link(OBJECT(eth0), "axistream-control-connected", cs, |
| 155 | &error_abort); |
| 156 | sysbus_realize_and_unref(SYS_BUS_DEVICE(eth0), &error_fatal); |
| 157 | sysbus_mmio_map(SYS_BUS_DEVICE(eth0), 0, AXIENET_BASEADDR); |
| 158 | sysbus_connect_irq(SYS_BUS_DEVICE(eth0), 0, irq[AXIENET_IRQ]); |
| 159 | |
| 160 | ds = object_property_get_link(OBJECT(eth0), |
| 161 | "axistream-connected-target", NULL); |
| 162 | cs = object_property_get_link(OBJECT(eth0), |
| 163 | "axistream-control-connected-target", NULL); |
| 164 | qdev_prop_set_uint32(dma, "freqhz", 100 * 1000000); |
| 165 | object_property_set_link(OBJECT(dma), "axistream-connected", ds, |
| 166 | &error_abort); |
| 167 | object_property_set_link(OBJECT(dma), "axistream-control-connected", cs, |
| 168 | &error_abort); |
| 169 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal); |
| 170 | sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, AXIDMA_BASEADDR); |
| 171 | sysbus_connect_irq(SYS_BUS_DEVICE(dma), 0, irq[AXIDMA_IRQ0]); |
| 172 | sysbus_connect_irq(SYS_BUS_DEVICE(dma), 1, irq[AXIDMA_IRQ1]); |
| 173 | |
| 174 | { |
| 175 | SSIBus *spi; |
| 176 | |
| 177 | dev = qdev_new("xlnx.xps-spi"); |
| 178 | qdev_prop_set_enum(dev, "endianness", ENDIAN_MODE_LITTLE); |
| 179 | qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES); |
| 180 | busdev = SYS_BUS_DEVICE(dev); |
| 181 | sysbus_realize_and_unref(busdev, &error_fatal); |
| 182 | sysbus_mmio_map(busdev, 0, SPI_BASEADDR); |
| 183 | sysbus_connect_irq(busdev, 0, irq[SPI_IRQ]); |
| 184 | |
| 185 | spi = (SSIBus *)qdev_get_child_bus(dev, "spi"); |
| 186 | |
| 187 | for (i = 0; i < NUM_SPI_FLASHES; i++) { |
| 188 | dinfo = drive_get(IF_MTD, 0, i); |
| 189 | qemu_irq cs_line; |
| 190 | |
| 191 | dev = qdev_new("n25q128"); |
| 192 | if (dinfo) { |
| 193 | qdev_prop_set_drive_err(dev, "drive", |
| 194 | blk_by_legacy_dinfo(dinfo), |
| 195 | &error_fatal); |
| 196 | } |
| 197 | qdev_prop_set_uint8(dev, "cs", i); |
| 198 | qdev_realize_and_unref(dev, BUS(spi), &error_fatal); |
| 199 | |
| 200 | cs_line = qdev_get_gpio_in_named(dev, SSI_GPIO_CS, 0); |
| 201 | sysbus_connect_irq(busdev, i+1, cs_line); |
| 202 | } |
| 203 | } |
| 204 | |
| 205 | /* setup PVR to match kernel settings */ |
| 206 | cpu->cfg.pvr_regs[4] = 0xc56b8000; |
| 207 | cpu->cfg.pvr_regs[5] = 0xc56be000; |
| 208 | cpu->cfg.pvr_regs[10] = 0x0e000000; /* virtex 6 */ |
| 209 | |
| 210 | microblaze_load_kernel(cpu, true, MEMORY_BASEADDR, ram_size, |
| 211 | machine->initrd_filename, |
| 212 | BINARY_DEVICE_TREE_FILE, |
| 213 | NULL); |
| 214 | |
| 215 | } |
| 216 | |
| 217 | static void petalogix_ml605_machine_init(MachineClass *mc) |
| 218 | { |
| 219 | mc->desc = "PetaLogix linux refdesign for xilinx ml605 (little endian)"; |
| 220 | mc->init = petalogix_ml605_init; |
| 221 | } |
| 222 | |
| 223 | DEFINE_MACHINE("petalogix-ml605", petalogix_ml605_machine_init) |