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1 /*
2 * IMX6 Clock Control Module
3 *
4 * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 *
9 * To get the timer frequencies right, we need to emulate at least part of
10 * the CCM.
11 */
12
13 #include "qemu/osdep.h"
14 #include "hw/misc/imx6_ccm.h"
15 #include "migration/vmstate.h"
16 #include "qemu/log.h"
17 #include "qemu/module.h"
18 #include "trace.h"
19
20 static const char *imx6_ccm_reg_name(uint32_t reg)
21 {
22 static char unknown[20];
23
24 switch (reg) {
25 case CCM_CCR:
26 return "CCR";
27 case CCM_CCDR:
28 return "CCDR";
29 case CCM_CSR:
30 return "CSR";
31 case CCM_CCSR:
32 return "CCSR";
33 case CCM_CACRR:
34 return "CACRR";
35 case CCM_CBCDR:
36 return "CBCDR";
37 case CCM_CBCMR:
38 return "CBCMR";
39 case CCM_CSCMR1:
40 return "CSCMR1";
41 case CCM_CSCMR2:
42 return "CSCMR2";
43 case CCM_CSCDR1:
44 return "CSCDR1";
45 case CCM_CS1CDR:
46 return "CS1CDR";
47 case CCM_CS2CDR:
48 return "CS2CDR";
49 case CCM_CDCDR:
50 return "CDCDR";
51 case CCM_CHSCCDR:
52 return "CHSCCDR";
53 case CCM_CSCDR2:
54 return "CSCDR2";
55 case CCM_CSCDR3:
56 return "CSCDR3";
57 case CCM_CDHIPR:
58 return "CDHIPR";
59 case CCM_CTOR:
60 return "CTOR";
61 case CCM_CLPCR:
62 return "CLPCR";
63 case CCM_CISR:
64 return "CISR";
65 case CCM_CIMR:
66 return "CIMR";
67 case CCM_CCOSR:
68 return "CCOSR";
69 case CCM_CGPR:
70 return "CGPR";
71 case CCM_CCGR0:
72 return "CCGR0";
73 case CCM_CCGR1:
74 return "CCGR1";
75 case CCM_CCGR2:
76 return "CCGR2";
77 case CCM_CCGR3:
78 return "CCGR3";
79 case CCM_CCGR4:
80 return "CCGR4";
81 case CCM_CCGR5:
82 return "CCGR5";
83 case CCM_CCGR6:
84 return "CCGR6";
85 case CCM_CMEOR:
86 return "CMEOR";
87 default:
88 snprintf(unknown, sizeof(unknown), "%u ?", reg);
89 return unknown;
90 }
91 }
92
93 static const char *imx6_analog_reg_name(uint32_t reg)
94 {
95 static char unknown[20];
96
97 switch (reg) {
98 case CCM_ANALOG_PLL_ARM:
99 return "PLL_ARM";
100 case CCM_ANALOG_PLL_ARM_SET:
101 return "PLL_ARM_SET";
102 case CCM_ANALOG_PLL_ARM_CLR:
103 return "PLL_ARM_CLR";
104 case CCM_ANALOG_PLL_ARM_TOG:
105 return "PLL_ARM_TOG";
106 case CCM_ANALOG_PLL_USB1:
107 return "PLL_USB1";
108 case CCM_ANALOG_PLL_USB1_SET:
109 return "PLL_USB1_SET";
110 case CCM_ANALOG_PLL_USB1_CLR:
111 return "PLL_USB1_CLR";
112 case CCM_ANALOG_PLL_USB1_TOG:
113 return "PLL_USB1_TOG";
114 case CCM_ANALOG_PLL_USB2:
115 return "PLL_USB2";
116 case CCM_ANALOG_PLL_USB2_SET:
117 return "PLL_USB2_SET";
118 case CCM_ANALOG_PLL_USB2_CLR:
119 return "PLL_USB2_CLR";
120 case CCM_ANALOG_PLL_USB2_TOG:
121 return "PLL_USB2_TOG";
122 case CCM_ANALOG_PLL_SYS:
123 return "PLL_SYS";
124 case CCM_ANALOG_PLL_SYS_SET:
125 return "PLL_SYS_SET";
126 case CCM_ANALOG_PLL_SYS_CLR:
127 return "PLL_SYS_CLR";
128 case CCM_ANALOG_PLL_SYS_TOG:
129 return "PLL_SYS_TOG";
130 case CCM_ANALOG_PLL_SYS_SS:
131 return "PLL_SYS_SS";
132 case CCM_ANALOG_PLL_SYS_NUM:
133 return "PLL_SYS_NUM";
134 case CCM_ANALOG_PLL_SYS_DENOM:
135 return "PLL_SYS_DENOM";
136 case CCM_ANALOG_PLL_AUDIO:
137 return "PLL_AUDIO";
138 case CCM_ANALOG_PLL_AUDIO_SET:
139 return "PLL_AUDIO_SET";
140 case CCM_ANALOG_PLL_AUDIO_CLR:
141 return "PLL_AUDIO_CLR";
142 case CCM_ANALOG_PLL_AUDIO_TOG:
143 return "PLL_AUDIO_TOG";
144 case CCM_ANALOG_PLL_AUDIO_NUM:
145 return "PLL_AUDIO_NUM";
146 case CCM_ANALOG_PLL_AUDIO_DENOM:
147 return "PLL_AUDIO_DENOM";
148 case CCM_ANALOG_PLL_VIDEO:
149 return "PLL_VIDEO";
150 case CCM_ANALOG_PLL_VIDEO_SET:
151 return "PLL_VIDEO_SET";
152 case CCM_ANALOG_PLL_VIDEO_CLR:
153 return "PLL_VIDEO_CLR";
154 case CCM_ANALOG_PLL_VIDEO_TOG:
155 return "PLL_VIDEO_TOG";
156 case CCM_ANALOG_PLL_VIDEO_NUM:
157 return "PLL_VIDEO_NUM";
158 case CCM_ANALOG_PLL_VIDEO_DENOM:
159 return "PLL_VIDEO_DENOM";
160 case CCM_ANALOG_PLL_MLB:
161 return "PLL_MLB";
162 case CCM_ANALOG_PLL_MLB_SET:
163 return "PLL_MLB_SET";
164 case CCM_ANALOG_PLL_MLB_CLR:
165 return "PLL_MLB_CLR";
166 case CCM_ANALOG_PLL_MLB_TOG:
167 return "PLL_MLB_TOG";
168 case CCM_ANALOG_PLL_ENET:
169 return "PLL_ENET";
170 case CCM_ANALOG_PLL_ENET_SET:
171 return "PLL_ENET_SET";
172 case CCM_ANALOG_PLL_ENET_CLR:
173 return "PLL_ENET_CLR";
174 case CCM_ANALOG_PLL_ENET_TOG:
175 return "PLL_ENET_TOG";
176 case CCM_ANALOG_PFD_480:
177 return "PFD_480";
178 case CCM_ANALOG_PFD_480_SET:
179 return "PFD_480_SET";
180 case CCM_ANALOG_PFD_480_CLR:
181 return "PFD_480_CLR";
182 case CCM_ANALOG_PFD_480_TOG:
183 return "PFD_480_TOG";
184 case CCM_ANALOG_PFD_528:
185 return "PFD_528";
186 case CCM_ANALOG_PFD_528_SET:
187 return "PFD_528_SET";
188 case CCM_ANALOG_PFD_528_CLR:
189 return "PFD_528_CLR";
190 case CCM_ANALOG_PFD_528_TOG:
191 return "PFD_528_TOG";
192 case CCM_ANALOG_MISC0:
193 return "MISC0";
194 case CCM_ANALOG_MISC0_SET:
195 return "MISC0_SET";
196 case CCM_ANALOG_MISC0_CLR:
197 return "MISC0_CLR";
198 case CCM_ANALOG_MISC0_TOG:
199 return "MISC0_TOG";
200 case CCM_ANALOG_MISC2:
201 return "MISC2";
202 case CCM_ANALOG_MISC2_SET:
203 return "MISC2_SET";
204 case CCM_ANALOG_MISC2_CLR:
205 return "MISC2_CLR";
206 case CCM_ANALOG_MISC2_TOG:
207 return "MISC2_TOG";
208 case PMU_REG_1P1:
209 return "PMU_REG_1P1";
210 case PMU_REG_3P0:
211 return "PMU_REG_3P0";
212 case PMU_REG_2P5:
213 return "PMU_REG_2P5";
214 case PMU_REG_CORE:
215 return "PMU_REG_CORE";
216 case PMU_MISC1:
217 return "PMU_MISC1";
218 case PMU_MISC1_SET:
219 return "PMU_MISC1_SET";
220 case PMU_MISC1_CLR:
221 return "PMU_MISC1_CLR";
222 case PMU_MISC1_TOG:
223 return "PMU_MISC1_TOG";
224 case USB_ANALOG_DIGPROG:
225 return "USB_ANALOG_DIGPROG";
226 default:
227 snprintf(unknown, sizeof(unknown), "%u ?", reg);
228 return unknown;
229 }
230 }
231
232 #define CKIH_FREQ 24000000 /* 24MHz crystal input */
233
234 static const VMStateDescription vmstate_imx6_ccm = {
235 .name = TYPE_IMX6_CCM,
236 .version_id = 1,
237 .minimum_version_id = 1,
238 .fields = (const VMStateField[]) {
239 VMSTATE_UINT32_ARRAY(ccm, IMX6CCMState, CCM_MAX),
240 VMSTATE_UINT32_ARRAY(analog, IMX6CCMState, CCM_ANALOG_MAX),
241 VMSTATE_END_OF_LIST()
242 },
243 };
244
245 static uint64_t imx6_analog_get_pll2_clk(IMX6CCMState *dev)
246 {
247 uint64_t freq = 24000000;
248
249 if (EXTRACT(dev->analog[CCM_ANALOG_PLL_SYS], DIV_SELECT)) {
250 freq *= 22;
251 } else {
252 freq *= 20;
253 }
254
255 trace_imx6_analog_get_pll2_clk(freq);
256
257 return freq;
258 }
259
260 static uint64_t imx6_analog_get_pll3_clk(IMX6CCMState *dev)
261 {
262 uint64_t freq = 480000000;
263
264 trace_imx6_analog_get_pll3_clk(freq);
265
266 return freq;
267 }
268
269 static uint64_t imx6_analog_get_pll2_pfd0_clk(IMX6CCMState *dev)
270 {
271 uint64_t freq = 0;
272
273 freq = imx6_analog_get_pll2_clk(dev) * 18
274 / EXTRACT(dev->analog[CCM_ANALOG_PFD_528], PFD0_FRAC);
275
276 trace_imx6_analog_get_pll2_pfd0_clk(freq);
277
278 return freq;
279 }
280
281 static uint64_t imx6_analog_get_pll2_pfd2_clk(IMX6CCMState *dev)
282 {
283 uint64_t freq = 0;
284
285 freq = imx6_analog_get_pll2_clk(dev) * 18
286 / EXTRACT(dev->analog[CCM_ANALOG_PFD_528], PFD2_FRAC);
287
288 trace_imx6_analog_get_pll2_pfd2_clk(freq);
289
290 return freq;
291 }
292
293 static uint64_t imx6_analog_get_periph_clk(IMX6CCMState *dev)
294 {
295 uint64_t freq = 0;
296
297 switch (EXTRACT(dev->ccm[CCM_CBCMR], PRE_PERIPH_CLK_SEL)) {
298 case 0:
299 freq = imx6_analog_get_pll2_clk(dev);
300 break;
301 case 1:
302 freq = imx6_analog_get_pll2_pfd2_clk(dev);
303 break;
304 case 2:
305 freq = imx6_analog_get_pll2_pfd0_clk(dev);
306 break;
307 case 3:
308 freq = imx6_analog_get_pll2_pfd2_clk(dev) / 2;
309 break;
310 default:
311 /* We should never get there */
312 g_assert_not_reached();
313 }
314
315 trace_imx6_analog_get_periph_clk(freq);
316
317 return freq;
318 }
319
320 static uint64_t imx6_ccm_get_ahb_clk(IMX6CCMState *dev)
321 {
322 uint64_t freq = 0;
323
324 freq = imx6_analog_get_periph_clk(dev)
325 / (1 + EXTRACT(dev->ccm[CCM_CBCDR], AHB_PODF));
326
327 trace_imx6_ccm_get_ahb_clk(freq);
328
329 return freq;
330 }
331
332 static uint64_t imx6_ccm_get_ipg_clk(IMX6CCMState *dev)
333 {
334 uint64_t freq = 0;
335
336 freq = imx6_ccm_get_ahb_clk(dev)
337 / (1 + EXTRACT(dev->ccm[CCM_CBCDR], IPG_PODF));
338
339 trace_imx6_ccm_get_ipg_clk(freq);
340
341 return freq;
342 }
343
344 static uint64_t imx6_ccm_get_per_clk(IMX6CCMState *dev)
345 {
346 uint64_t freq = 0;
347
348 freq = imx6_ccm_get_ipg_clk(dev)
349 / (1 + EXTRACT(dev->ccm[CCM_CSCMR1], PERCLK_PODF));
350
351 trace_imx6_ccm_get_per_clk(freq);
352
353 return freq;
354 }
355
356 static uint64_t imx6_ccm_get_can_clk(IMX6CCMState *dev)
357 {
358 uint64_t freq = 0;
359
360 freq = imx6_analog_get_pll3_clk(dev) / 8;
361 freq /= (1 + EXTRACT(dev->ccm[CCM_CSCMR2], CAN_CLK_PODF));
362
363 trace_imx6_ccm_get_can_clk(freq);
364
365 return freq;
366 }
367
368 static uint32_t imx6_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock)
369 {
370 uint32_t freq = 0;
371 IMX6CCMState *s = IMX6_CCM(dev);
372
373 switch (clock) {
374 case CLK_NONE:
375 break;
376 case CLK_IPG:
377 freq = imx6_ccm_get_ipg_clk(s);
378 break;
379 case CLK_IPG_HIGH:
380 freq = imx6_ccm_get_per_clk(s);
381 break;
382 case CLK_CAN:
383 freq = imx6_ccm_get_can_clk(s);
384 break;
385 case CLK_32k:
386 freq = CKIL_FREQ;
387 break;
388 case CLK_HIGH:
389 freq = 24000000;
390 break;
391 case CLK_HIGH_DIV:
392 freq = 24000000 / 8;
393 break;
394 default:
395 qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: unsupported clock %d\n",
396 TYPE_IMX6_CCM, __func__, clock);
397 break;
398 }
399
400 trace_imx6_ccm_get_clock_frequency(clock, freq);
401
402 return freq;
403 }
404
405 static void imx6_ccm_reset(DeviceState *dev)
406 {
407 IMX6CCMState *s = IMX6_CCM(dev);
408
409 trace_imx6_ccm_reset();
410
411 s->ccm[CCM_CCR] = 0x040116FF;
412 s->ccm[CCM_CCDR] = 0x00000000;
413 s->ccm[CCM_CSR] = 0x00000010;
414 s->ccm[CCM_CCSR] = 0x00000100;
415 s->ccm[CCM_CACRR] = 0x00000000;
416 s->ccm[CCM_CBCDR] = 0x00018D40;
417 s->ccm[CCM_CBCMR] = 0x00022324;
418 s->ccm[CCM_CSCMR1] = 0x00F00000;
419 s->ccm[CCM_CSCMR2] = 0x02B92F06;
420 s->ccm[CCM_CSCDR1] = 0x00490B00;
421 s->ccm[CCM_CS1CDR] = 0x0EC102C1;
422 s->ccm[CCM_CS2CDR] = 0x000736C1;
423 s->ccm[CCM_CDCDR] = 0x33F71F92;
424 s->ccm[CCM_CHSCCDR] = 0x0002A150;
425 s->ccm[CCM_CSCDR2] = 0x0002A150;
426 s->ccm[CCM_CSCDR3] = 0x00014841;
427 s->ccm[CCM_CDHIPR] = 0x00000000;
428 s->ccm[CCM_CTOR] = 0x00000000;
429 s->ccm[CCM_CLPCR] = 0x00000079;
430 s->ccm[CCM_CISR] = 0x00000000;
431 s->ccm[CCM_CIMR] = 0xFFFFFFFF;
432 s->ccm[CCM_CCOSR] = 0x000A0001;
433 s->ccm[CCM_CGPR] = 0x0000FE62;
434 s->ccm[CCM_CCGR0] = 0xFFFFFFFF;
435 s->ccm[CCM_CCGR1] = 0xFFFFFFFF;
436 s->ccm[CCM_CCGR2] = 0xFC3FFFFF;
437 s->ccm[CCM_CCGR3] = 0xFFFFFFFF;
438 s->ccm[CCM_CCGR4] = 0xFFFFFFFF;
439 s->ccm[CCM_CCGR5] = 0xFFFFFFFF;
440 s->ccm[CCM_CCGR6] = 0xFFFFFFFF;
441 s->ccm[CCM_CMEOR] = 0xFFFFFFFF;
442
443 s->analog[CCM_ANALOG_PLL_ARM] = 0x00013042;
444 s->analog[CCM_ANALOG_PLL_USB1] = 0x00012000;
445 s->analog[CCM_ANALOG_PLL_USB2] = 0x00012000;
446 s->analog[CCM_ANALOG_PLL_SYS] = 0x00013001;
447 s->analog[CCM_ANALOG_PLL_SYS_SS] = 0x00000000;
448 s->analog[CCM_ANALOG_PLL_SYS_NUM] = 0x00000000;
449 s->analog[CCM_ANALOG_PLL_SYS_DENOM] = 0x00000012;
450 s->analog[CCM_ANALOG_PLL_AUDIO] = 0x00011006;
451 s->analog[CCM_ANALOG_PLL_AUDIO_NUM] = 0x05F5E100;
452 s->analog[CCM_ANALOG_PLL_AUDIO_DENOM] = 0x2964619C;
453 s->analog[CCM_ANALOG_PLL_VIDEO] = 0x0001100C;
454 s->analog[CCM_ANALOG_PLL_VIDEO_NUM] = 0x05F5E100;
455 s->analog[CCM_ANALOG_PLL_VIDEO_DENOM] = 0x10A24447;
456 s->analog[CCM_ANALOG_PLL_MLB] = 0x00010000;
457 s->analog[CCM_ANALOG_PLL_ENET] = 0x00011001;
458 s->analog[CCM_ANALOG_PFD_480] = 0x1311100C;
459 s->analog[CCM_ANALOG_PFD_528] = 0x1018101B;
460
461 s->analog[PMU_REG_1P1] = 0x00001073;
462 s->analog[PMU_REG_3P0] = 0x00000F74;
463 s->analog[PMU_REG_2P5] = 0x00005071;
464 s->analog[PMU_REG_CORE] = 0x00402010;
465 s->analog[PMU_MISC0] = 0x04000080;
466 s->analog[PMU_MISC1] = 0x00000000;
467 s->analog[PMU_MISC2] = 0x00272727;
468
469 s->analog[USB_ANALOG_USB1_VBUS_DETECT] = 0x00000004;
470 s->analog[USB_ANALOG_USB1_CHRG_DETECT] = 0x00000000;
471 s->analog[USB_ANALOG_USB1_VBUS_DETECT_STAT] = 0x00000000;
472 s->analog[USB_ANALOG_USB1_CHRG_DETECT_STAT] = 0x00000000;
473 s->analog[USB_ANALOG_USB1_MISC] = 0x00000002;
474 s->analog[USB_ANALOG_USB2_VBUS_DETECT] = 0x00000004;
475 s->analog[USB_ANALOG_USB2_CHRG_DETECT] = 0x00000000;
476 s->analog[USB_ANALOG_USB2_MISC] = 0x00000002;
477 s->analog[USB_ANALOG_DIGPROG] = 0x00630000;
478
479 /* all PLLs need to be locked */
480 s->analog[CCM_ANALOG_PLL_ARM] |= CCM_ANALOG_PLL_LOCK;
481 s->analog[CCM_ANALOG_PLL_USB1] |= CCM_ANALOG_PLL_LOCK;
482 s->analog[CCM_ANALOG_PLL_USB2] |= CCM_ANALOG_PLL_LOCK;
483 s->analog[CCM_ANALOG_PLL_SYS] |= CCM_ANALOG_PLL_LOCK;
484 s->analog[CCM_ANALOG_PLL_AUDIO] |= CCM_ANALOG_PLL_LOCK;
485 s->analog[CCM_ANALOG_PLL_VIDEO] |= CCM_ANALOG_PLL_LOCK;
486 s->analog[CCM_ANALOG_PLL_MLB] |= CCM_ANALOG_PLL_LOCK;
487 s->analog[CCM_ANALOG_PLL_ENET] |= CCM_ANALOG_PLL_LOCK;
488 }
489
490 static uint64_t imx6_ccm_read(void *opaque, hwaddr offset, unsigned size)
491 {
492 uint32_t value = 0;
493 uint32_t index = offset >> 2;
494 IMX6CCMState *s = (IMX6CCMState *)opaque;
495
496 value = s->ccm[index];
497
498 trace_imx6_ccm_read(imx6_ccm_reg_name(index), value);
499
500 return (uint64_t)value;
501 }
502
503 static void imx6_ccm_write(void *opaque, hwaddr offset, uint64_t value,
504 unsigned size)
505 {
506 uint32_t index = offset >> 2;
507 IMX6CCMState *s = (IMX6CCMState *)opaque;
508
509 trace_imx6_ccm_write(imx6_ccm_reg_name(index), (uint32_t)value);
510
511 /*
512 * We will do a better implementation later. In particular some bits
513 * cannot be written to.
514 */
515 s->ccm[index] = (uint32_t)value;
516 }
517
518 static uint64_t imx6_analog_read(void *opaque, hwaddr offset, unsigned size)
519 {
520 uint32_t value;
521 uint32_t index = offset >> 2;
522 IMX6CCMState *s = (IMX6CCMState *)opaque;
523
524 switch (index) {
525 case CCM_ANALOG_PLL_ARM_SET:
526 case CCM_ANALOG_PLL_USB1_SET:
527 case CCM_ANALOG_PLL_USB2_SET:
528 case CCM_ANALOG_PLL_SYS_SET:
529 case CCM_ANALOG_PLL_AUDIO_SET:
530 case CCM_ANALOG_PLL_VIDEO_SET:
531 case CCM_ANALOG_PLL_MLB_SET:
532 case CCM_ANALOG_PLL_ENET_SET:
533 case CCM_ANALOG_PFD_480_SET:
534 case CCM_ANALOG_PFD_528_SET:
535 case CCM_ANALOG_MISC0_SET:
536 case PMU_MISC1_SET:
537 case CCM_ANALOG_MISC2_SET:
538 case USB_ANALOG_USB1_VBUS_DETECT_SET:
539 case USB_ANALOG_USB1_CHRG_DETECT_SET:
540 case USB_ANALOG_USB1_MISC_SET:
541 case USB_ANALOG_USB2_VBUS_DETECT_SET:
542 case USB_ANALOG_USB2_CHRG_DETECT_SET:
543 case USB_ANALOG_USB2_MISC_SET:
544 /*
545 * All REG_NAME_SET register access are in fact targeting the
546 * the REG_NAME register.
547 */
548 value = s->analog[index - 1];
549 break;
550 case CCM_ANALOG_PLL_ARM_CLR:
551 case CCM_ANALOG_PLL_USB1_CLR:
552 case CCM_ANALOG_PLL_USB2_CLR:
553 case CCM_ANALOG_PLL_SYS_CLR:
554 case CCM_ANALOG_PLL_AUDIO_CLR:
555 case CCM_ANALOG_PLL_VIDEO_CLR:
556 case CCM_ANALOG_PLL_MLB_CLR:
557 case CCM_ANALOG_PLL_ENET_CLR:
558 case CCM_ANALOG_PFD_480_CLR:
559 case CCM_ANALOG_PFD_528_CLR:
560 case CCM_ANALOG_MISC0_CLR:
561 case PMU_MISC1_CLR:
562 case CCM_ANALOG_MISC2_CLR:
563 case USB_ANALOG_USB1_VBUS_DETECT_CLR:
564 case USB_ANALOG_USB1_CHRG_DETECT_CLR:
565 case USB_ANALOG_USB1_MISC_CLR:
566 case USB_ANALOG_USB2_VBUS_DETECT_CLR:
567 case USB_ANALOG_USB2_CHRG_DETECT_CLR:
568 case USB_ANALOG_USB2_MISC_CLR:
569 /*
570 * All REG_NAME_CLR register access are in fact targeting the
571 * the REG_NAME register.
572 */
573 value = s->analog[index - 2];
574 break;
575 case CCM_ANALOG_PLL_ARM_TOG:
576 case CCM_ANALOG_PLL_USB1_TOG:
577 case CCM_ANALOG_PLL_USB2_TOG:
578 case CCM_ANALOG_PLL_SYS_TOG:
579 case CCM_ANALOG_PLL_AUDIO_TOG:
580 case CCM_ANALOG_PLL_VIDEO_TOG:
581 case CCM_ANALOG_PLL_MLB_TOG:
582 case CCM_ANALOG_PLL_ENET_TOG:
583 case CCM_ANALOG_PFD_480_TOG:
584 case CCM_ANALOG_PFD_528_TOG:
585 case CCM_ANALOG_MISC0_TOG:
586 case PMU_MISC1_TOG:
587 case CCM_ANALOG_MISC2_TOG:
588 case USB_ANALOG_USB1_VBUS_DETECT_TOG:
589 case USB_ANALOG_USB1_CHRG_DETECT_TOG:
590 case USB_ANALOG_USB1_MISC_TOG:
591 case USB_ANALOG_USB2_VBUS_DETECT_TOG:
592 case USB_ANALOG_USB2_CHRG_DETECT_TOG:
593 case USB_ANALOG_USB2_MISC_TOG:
594 /*
595 * All REG_NAME_TOG register access are in fact targeting the
596 * the REG_NAME register.
597 */
598 value = s->analog[index - 3];
599 break;
600 default:
601 value = s->analog[index];
602 break;
603 }
604
605 trace_imx6_analog_read(imx6_analog_reg_name(index), value);
606
607 return (uint64_t)value;
608 }
609
610 static void imx6_analog_write(void *opaque, hwaddr offset, uint64_t value,
611 unsigned size)
612 {
613 uint32_t index = offset >> 2;
614 IMX6CCMState *s = (IMX6CCMState *)opaque;
615
616 trace_imx6_analog_write(imx6_analog_reg_name(index), (uint32_t)value);
617
618 switch (index) {
619 case CCM_ANALOG_PLL_ARM_SET:
620 case CCM_ANALOG_PLL_USB1_SET:
621 case CCM_ANALOG_PLL_USB2_SET:
622 case CCM_ANALOG_PLL_SYS_SET:
623 case CCM_ANALOG_PLL_AUDIO_SET:
624 case CCM_ANALOG_PLL_VIDEO_SET:
625 case CCM_ANALOG_PLL_MLB_SET:
626 case CCM_ANALOG_PLL_ENET_SET:
627 case CCM_ANALOG_PFD_480_SET:
628 case CCM_ANALOG_PFD_528_SET:
629 case CCM_ANALOG_MISC0_SET:
630 case PMU_MISC1_SET:
631 case CCM_ANALOG_MISC2_SET:
632 case USB_ANALOG_USB1_VBUS_DETECT_SET:
633 case USB_ANALOG_USB1_CHRG_DETECT_SET:
634 case USB_ANALOG_USB1_MISC_SET:
635 case USB_ANALOG_USB2_VBUS_DETECT_SET:
636 case USB_ANALOG_USB2_CHRG_DETECT_SET:
637 case USB_ANALOG_USB2_MISC_SET:
638 /*
639 * All REG_NAME_SET register access are in fact targeting the
640 * the REG_NAME register. So we change the value of the
641 * REG_NAME register, setting bits passed in the value.
642 */
643 s->analog[index - 1] |= value;
644 break;
645 case CCM_ANALOG_PLL_ARM_CLR:
646 case CCM_ANALOG_PLL_USB1_CLR:
647 case CCM_ANALOG_PLL_USB2_CLR:
648 case CCM_ANALOG_PLL_SYS_CLR:
649 case CCM_ANALOG_PLL_AUDIO_CLR:
650 case CCM_ANALOG_PLL_VIDEO_CLR:
651 case CCM_ANALOG_PLL_MLB_CLR:
652 case CCM_ANALOG_PLL_ENET_CLR:
653 case CCM_ANALOG_PFD_480_CLR:
654 case CCM_ANALOG_PFD_528_CLR:
655 case CCM_ANALOG_MISC0_CLR:
656 case PMU_MISC1_CLR:
657 case CCM_ANALOG_MISC2_CLR:
658 case USB_ANALOG_USB1_VBUS_DETECT_CLR:
659 case USB_ANALOG_USB1_CHRG_DETECT_CLR:
660 case USB_ANALOG_USB1_MISC_CLR:
661 case USB_ANALOG_USB2_VBUS_DETECT_CLR:
662 case USB_ANALOG_USB2_CHRG_DETECT_CLR:
663 case USB_ANALOG_USB2_MISC_CLR:
664 /*
665 * All REG_NAME_CLR register access are in fact targeting the
666 * the REG_NAME register. So we change the value of the
667 * REG_NAME register, unsetting bits passed in the value.
668 */
669 s->analog[index - 2] &= ~value;
670 break;
671 case CCM_ANALOG_PLL_ARM_TOG:
672 case CCM_ANALOG_PLL_USB1_TOG:
673 case CCM_ANALOG_PLL_USB2_TOG:
674 case CCM_ANALOG_PLL_SYS_TOG:
675 case CCM_ANALOG_PLL_AUDIO_TOG:
676 case CCM_ANALOG_PLL_VIDEO_TOG:
677 case CCM_ANALOG_PLL_MLB_TOG:
678 case CCM_ANALOG_PLL_ENET_TOG:
679 case CCM_ANALOG_PFD_480_TOG:
680 case CCM_ANALOG_PFD_528_TOG:
681 case CCM_ANALOG_MISC0_TOG:
682 case PMU_MISC1_TOG:
683 case CCM_ANALOG_MISC2_TOG:
684 case USB_ANALOG_USB1_VBUS_DETECT_TOG:
685 case USB_ANALOG_USB1_CHRG_DETECT_TOG:
686 case USB_ANALOG_USB1_MISC_TOG:
687 case USB_ANALOG_USB2_VBUS_DETECT_TOG:
688 case USB_ANALOG_USB2_CHRG_DETECT_TOG:
689 case USB_ANALOG_USB2_MISC_TOG:
690 /*
691 * All REG_NAME_TOG register access are in fact targeting the
692 * the REG_NAME register. So we change the value of the
693 * REG_NAME register, toggling bits passed in the value.
694 */
695 s->analog[index - 3] ^= value;
696 break;
697 default:
698 /*
699 * We will do a better implementation later. In particular some bits
700 * cannot be written to.
701 */
702 s->analog[index] = value;
703 break;
704 }
705 }
706
707 static const struct MemoryRegionOps imx6_ccm_ops = {
708 .read = imx6_ccm_read,
709 .write = imx6_ccm_write,
710 .endianness = DEVICE_NATIVE_ENDIAN,
711 .valid = {
712 /*
713 * Our device would not work correctly if the guest was doing
714 * unaligned access. This might not be a limitation on the real
715 * device but in practice there is no reason for a guest to access
716 * this device unaligned.
717 */
718 .min_access_size = 4,
719 .max_access_size = 4,
720 .unaligned = false,
721 },
722 };
723
724 static const struct MemoryRegionOps imx6_analog_ops = {
725 .read = imx6_analog_read,
726 .write = imx6_analog_write,
727 .endianness = DEVICE_NATIVE_ENDIAN,
728 .valid = {
729 /*
730 * Our device would not work correctly if the guest was doing
731 * unaligned access. This might not be a limitation on the real
732 * device but in practice there is no reason for a guest to access
733 * this device unaligned.
734 */
735 .min_access_size = 4,
736 .max_access_size = 4,
737 .unaligned = false,
738 },
739 };
740
741 static void imx6_ccm_init(Object *obj)
742 {
743 DeviceState *dev = DEVICE(obj);
744 SysBusDevice *sd = SYS_BUS_DEVICE(obj);
745 IMX6CCMState *s = IMX6_CCM(obj);
746
747 /* initialize a container for the all memory range */
748 memory_region_init(&s->container, OBJECT(dev), TYPE_IMX6_CCM, 0x5000);
749
750 /* We initialize an IO memory region for the CCM part */
751 memory_region_init_io(&s->ioccm, OBJECT(dev), &imx6_ccm_ops, s,
752 TYPE_IMX6_CCM ".ccm", CCM_MAX * sizeof(uint32_t));
753
754 /* Add the CCM as a subregion at offset 0 */
755 memory_region_add_subregion(&s->container, 0, &s->ioccm);
756
757 /* We initialize an IO memory region for the ANALOG part */
758 memory_region_init_io(&s->ioanalog, OBJECT(dev), &imx6_analog_ops, s,
759 TYPE_IMX6_CCM ".analog",
760 CCM_ANALOG_MAX * sizeof(uint32_t));
761
762 /* Add the ANALOG as a subregion at offset 0x4000 */
763 memory_region_add_subregion(&s->container, 0x4000, &s->ioanalog);
764
765 sysbus_init_mmio(sd, &s->container);
766 }
767
768 static void imx6_ccm_class_init(ObjectClass *klass, const void *data)
769 {
770 DeviceClass *dc = DEVICE_CLASS(klass);
771 IMXCCMClass *ccm = IMX_CCM_CLASS(klass);
772
773 device_class_set_legacy_reset(dc, imx6_ccm_reset);
774 dc->vmsd = &vmstate_imx6_ccm;
775 dc->desc = "i.MX6 Clock Control Module";
776
777 ccm->get_clock_frequency = imx6_ccm_get_clock_frequency;
778 }
779
780 static const TypeInfo imx6_ccm_info = {
781 .name = TYPE_IMX6_CCM,
782 .parent = TYPE_IMX_CCM,
783 .instance_size = sizeof(IMX6CCMState),
784 .instance_init = imx6_ccm_init,
785 .class_init = imx6_ccm_class_init,
786 };
787
788 static void imx6_ccm_register_types(void)
789 {
790 type_register_static(&imx6_ccm_info);
791 }
792
793 type_init(imx6_ccm_register_types)