| 1 | /* |
| 2 | * PowerMac MacIO device emulation |
| 3 | * |
| 4 | * Copyright (c) 2005-2007 Fabrice Bellard |
| 5 | * Copyright (c) 2007 Jocelyn Mayer |
| 6 | * |
| 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 8 | * of this software and associated documentation files (the "Software"), to deal |
| 9 | * in the Software without restriction, including without limitation the rights |
| 10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 11 | * copies of the Software, and to permit persons to whom the Software is |
| 12 | * furnished to do so, subject to the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice shall be included in |
| 15 | * all copies or substantial portions of the Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | * THE SOFTWARE. |
| 24 | */ |
| 25 | |
| 26 | #include "qemu/osdep.h" |
| 27 | #include "qapi/error.h" |
| 28 | #include "qemu/module.h" |
| 29 | #include "hw/misc/macio/cuda.h" |
| 30 | #include "hw/pci/pci.h" |
| 31 | #include "hw/ppc/mac_dbdma.h" |
| 32 | #include "hw/core/qdev-properties.h" |
| 33 | #include "migration/vmstate.h" |
| 34 | #include "hw/char/escc.h" |
| 35 | #include "hw/misc/macio/macio.h" |
| 36 | #include "hw/intc/heathrow_pic.h" |
| 37 | #include "trace.h" |
| 38 | |
| 39 | #define ESCC_CLOCK 3686400 |
| 40 | |
| 41 | /* Note: this code is strongly inspired by the corresponding code in PearPC */ |
| 42 | |
| 43 | /* |
| 44 | * The mac-io has two interfaces to the ESCC. One is called "escc-legacy", |
| 45 | * while the other one is the normal, current ESCC interface. |
| 46 | * |
| 47 | * The magic below creates memory aliases to spawn the escc-legacy device |
| 48 | * purely by rerouting the respective registers to our escc region. This |
| 49 | * works because the only difference between the two memory regions is the |
| 50 | * register layout, not their semantics. |
| 51 | * |
| 52 | * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf |
| 53 | */ |
| 54 | static void macio_escc_legacy_setup(MacIOState *s) |
| 55 | { |
| 56 | SysBusDevice *sbd = SYS_BUS_DEVICE(&s->escc); |
| 57 | MemoryRegion *escc_legacy = g_new(MemoryRegion, 1); |
| 58 | int i; |
| 59 | static const int maps[] = { |
| 60 | 0x00, 0x00, /* Command B */ |
| 61 | 0x02, 0x20, /* Command A */ |
| 62 | 0x04, 0x10, /* Data B */ |
| 63 | 0x06, 0x30, /* Data A */ |
| 64 | 0x08, 0x40, /* Enhancement B */ |
| 65 | 0x0A, 0x50, /* Enhancement A */ |
| 66 | 0x80, 0x80, /* Recovery count */ |
| 67 | 0x90, 0x90, /* Start A */ |
| 68 | 0xa0, 0xa0, /* Start B */ |
| 69 | 0xb0, 0xb0, /* Detect AB */ |
| 70 | }; |
| 71 | |
| 72 | memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256); |
| 73 | for (i = 0; i < ARRAY_SIZE(maps); i += 2) { |
| 74 | MemoryRegion *port = g_new(MemoryRegion, 1); |
| 75 | memory_region_init_alias(port, OBJECT(s), "escc-legacy-port", |
| 76 | sysbus_mmio_get_region(sbd, 0), |
| 77 | maps[i + 1], 0x2); |
| 78 | memory_region_add_subregion(escc_legacy, maps[i], port); |
| 79 | } |
| 80 | |
| 81 | memory_region_add_subregion(&s->bar, 0x12000, escc_legacy); |
| 82 | } |
| 83 | |
| 84 | static void macio_bar_setup(MacIOState *s) |
| 85 | { |
| 86 | SysBusDevice *sbd = SYS_BUS_DEVICE(&s->escc); |
| 87 | MemoryRegion *bar = sysbus_mmio_get_region(sbd, 0); |
| 88 | |
| 89 | memory_region_add_subregion(&s->bar, 0x13000, bar); |
| 90 | macio_escc_legacy_setup(s); |
| 91 | } |
| 92 | |
| 93 | static bool macio_common_realize(PCIDevice *d, Error **errp) |
| 94 | { |
| 95 | MacIOState *s = MACIO(d); |
| 96 | SysBusDevice *sbd; |
| 97 | |
| 98 | if (!qdev_realize(DEVICE(&s->dbdma), BUS(&s->macio_bus), errp)) { |
| 99 | return false; |
| 100 | } |
| 101 | sbd = SYS_BUS_DEVICE(&s->dbdma); |
| 102 | memory_region_add_subregion(&s->bar, 0x08000, |
| 103 | sysbus_mmio_get_region(sbd, 0)); |
| 104 | |
| 105 | qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0); |
| 106 | qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK); |
| 107 | qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4); |
| 108 | qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial); |
| 109 | qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial); |
| 110 | if (!qdev_realize(DEVICE(&s->escc), BUS(&s->macio_bus), errp)) { |
| 111 | return false; |
| 112 | } |
| 113 | |
| 114 | macio_bar_setup(s); |
| 115 | pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar); |
| 116 | |
| 117 | return true; |
| 118 | } |
| 119 | |
| 120 | static bool macio_realize_ide(MacIOState *s, MACIOIDEState *ide, |
| 121 | qemu_irq irq0, qemu_irq irq1, int dmaid, |
| 122 | Error **errp) |
| 123 | { |
| 124 | SysBusDevice *sbd = SYS_BUS_DEVICE(ide); |
| 125 | |
| 126 | qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid); |
| 127 | object_property_set_link(OBJECT(ide), "dbdma", OBJECT(&s->dbdma), |
| 128 | &error_abort); |
| 129 | macio_ide_register_dma(ide); |
| 130 | if (!qdev_realize(DEVICE(ide), BUS(&s->macio_bus), errp)) { |
| 131 | return false; |
| 132 | } |
| 133 | sysbus_connect_irq(sbd, 0, irq0); |
| 134 | sysbus_connect_irq(sbd, 1, irq1); |
| 135 | |
| 136 | return true; |
| 137 | } |
| 138 | |
| 139 | static void macio_oldworld_realize(PCIDevice *d, Error **errp) |
| 140 | { |
| 141 | MacIOState *s = MACIO(d); |
| 142 | OldWorldMacIOState *os = OLDWORLD_MACIO(d); |
| 143 | DeviceState *pic_dev = DEVICE(&os->pic); |
| 144 | SysBusDevice *sbd; |
| 145 | |
| 146 | if (!macio_common_realize(d, errp)) { |
| 147 | return; |
| 148 | } |
| 149 | |
| 150 | /* Heathrow PIC */ |
| 151 | if (!qdev_realize(DEVICE(&os->pic), BUS(&s->macio_bus), errp)) { |
| 152 | return; |
| 153 | } |
| 154 | sbd = SYS_BUS_DEVICE(&os->pic); |
| 155 | memory_region_add_subregion(&s->bar, 0x0, |
| 156 | sysbus_mmio_get_region(sbd, 0)); |
| 157 | |
| 158 | qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", |
| 159 | s->frequency); |
| 160 | if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), errp)) { |
| 161 | return; |
| 162 | } |
| 163 | sbd = SYS_BUS_DEVICE(&s->cuda); |
| 164 | memory_region_add_subregion(&s->bar, 0x16000, |
| 165 | sysbus_mmio_get_region(sbd, 0)); |
| 166 | sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, OLDWORLD_CUDA_IRQ)); |
| 167 | |
| 168 | sbd = SYS_BUS_DEVICE(&s->escc); |
| 169 | sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, OLDWORLD_ESCCB_IRQ)); |
| 170 | sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(pic_dev, OLDWORLD_ESCCA_IRQ)); |
| 171 | |
| 172 | if (!qdev_realize(DEVICE(&os->nvram), BUS(&s->macio_bus), errp)) { |
| 173 | return; |
| 174 | } |
| 175 | sbd = SYS_BUS_DEVICE(&os->nvram); |
| 176 | memory_region_add_subregion(&s->bar, 0x60000, |
| 177 | sysbus_mmio_get_region(sbd, 0)); |
| 178 | pmac_format_nvram_partition(&os->nvram, os->nvram.size); |
| 179 | |
| 180 | /* IDE buses */ |
| 181 | if (!macio_realize_ide(s, &os->ide[0], |
| 182 | qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ), |
| 183 | qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ), |
| 184 | 0x16, errp)) { |
| 185 | return; |
| 186 | } |
| 187 | |
| 188 | if (!macio_realize_ide(s, &os->ide[1], |
| 189 | qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ), |
| 190 | qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ), |
| 191 | 0x1a, errp)) { |
| 192 | return; |
| 193 | } |
| 194 | } |
| 195 | |
| 196 | static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, int index) |
| 197 | { |
| 198 | gchar *name = g_strdup_printf("ide[%i]", index); |
| 199 | uint32_t addr = 0x1f000 + ((index + 1) * 0x1000); |
| 200 | |
| 201 | object_initialize_child(OBJECT(s), name, ide, TYPE_MACIO_IDE); |
| 202 | qdev_prop_set_uint32(DEVICE(ide), "addr", addr); |
| 203 | memory_region_add_subregion(&s->bar, addr, &ide->mem); |
| 204 | g_free(name); |
| 205 | } |
| 206 | |
| 207 | static void macio_oldworld_init(Object *obj) |
| 208 | { |
| 209 | MacIOState *s = MACIO(obj); |
| 210 | OldWorldMacIOState *os = OLDWORLD_MACIO(obj); |
| 211 | DeviceState *dev; |
| 212 | int i; |
| 213 | |
| 214 | object_initialize_child(obj, "pic", &os->pic, TYPE_HEATHROW); |
| 215 | |
| 216 | object_initialize_child(obj, "cuda", &s->cuda, TYPE_CUDA); |
| 217 | |
| 218 | object_initialize_child(obj, "nvram", &os->nvram, TYPE_MACIO_NVRAM); |
| 219 | dev = DEVICE(&os->nvram); |
| 220 | qdev_prop_set_uint32(dev, "size", MACIO_NVRAM_SIZE); |
| 221 | qdev_prop_set_uint32(dev, "it_shift", 4); |
| 222 | |
| 223 | for (i = 0; i < 2; i++) { |
| 224 | macio_init_ide(s, &os->ide[i], i); |
| 225 | } |
| 226 | } |
| 227 | |
| 228 | static void timer_write(void *opaque, hwaddr addr, uint64_t value, |
| 229 | unsigned size) |
| 230 | { |
| 231 | trace_macio_timer_write(addr, size, value); |
| 232 | } |
| 233 | |
| 234 | static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size) |
| 235 | { |
| 236 | uint32_t value = 0; |
| 237 | uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); |
| 238 | uint64_t kltime; |
| 239 | |
| 240 | kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4); |
| 241 | kltime = muldiv64(kltime, 18432000, 1048575); |
| 242 | |
| 243 | switch (addr) { |
| 244 | case 0x38: |
| 245 | value = kltime; |
| 246 | break; |
| 247 | case 0x3c: |
| 248 | value = kltime >> 32; |
| 249 | break; |
| 250 | } |
| 251 | |
| 252 | trace_macio_timer_read(addr, size, value); |
| 253 | return value; |
| 254 | } |
| 255 | |
| 256 | static const MemoryRegionOps timer_ops = { |
| 257 | .read = timer_read, |
| 258 | .write = timer_write, |
| 259 | .endianness = DEVICE_LITTLE_ENDIAN, |
| 260 | }; |
| 261 | |
| 262 | static void macio_newworld_realize(PCIDevice *d, Error **errp) |
| 263 | { |
| 264 | MacIOState *s = MACIO(d); |
| 265 | NewWorldMacIOState *ns = NEWWORLD_MACIO(d); |
| 266 | DeviceState *pic_dev = DEVICE(&ns->pic); |
| 267 | SysBusDevice *sbd; |
| 268 | MemoryRegion *timer_memory = NULL; |
| 269 | |
| 270 | if (!macio_common_realize(d, errp)) { |
| 271 | return; |
| 272 | } |
| 273 | |
| 274 | /* OpenPIC */ |
| 275 | qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); |
| 276 | sbd = SYS_BUS_DEVICE(&ns->pic); |
| 277 | sysbus_realize_and_unref(sbd, &error_fatal); |
| 278 | memory_region_add_subregion(&s->bar, 0x40000, |
| 279 | sysbus_mmio_get_region(sbd, 0)); |
| 280 | |
| 281 | sbd = SYS_BUS_DEVICE(&s->escc); |
| 282 | sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCB_IRQ)); |
| 283 | sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(pic_dev, NEWWORLD_ESCCA_IRQ)); |
| 284 | |
| 285 | /* IDE buses */ |
| 286 | if (!macio_realize_ide(s, &ns->ide[0], |
| 287 | qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ), |
| 288 | qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ), |
| 289 | 0x16, errp)) { |
| 290 | return; |
| 291 | } |
| 292 | |
| 293 | if (!macio_realize_ide(s, &ns->ide[1], |
| 294 | qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ), |
| 295 | qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ), |
| 296 | 0x1a, errp)) { |
| 297 | return; |
| 298 | } |
| 299 | |
| 300 | /* Timer */ |
| 301 | timer_memory = g_new(MemoryRegion, 1); |
| 302 | memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer", |
| 303 | 0x1000); |
| 304 | memory_region_add_subregion(&s->bar, 0x15000, timer_memory); |
| 305 | |
| 306 | if (ns->has_pmu) { |
| 307 | /* GPIOs */ |
| 308 | if (!qdev_realize(DEVICE(&ns->gpio), BUS(&s->macio_bus), errp)) { |
| 309 | return; |
| 310 | } |
| 311 | sbd = SYS_BUS_DEVICE(&ns->gpio); |
| 312 | sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(pic_dev, |
| 313 | NEWWORLD_EXTING_GPIO1)); |
| 314 | sysbus_connect_irq(sbd, 9, qdev_get_gpio_in(pic_dev, |
| 315 | NEWWORLD_EXTING_GPIO9)); |
| 316 | memory_region_add_subregion(&s->bar, 0x50, |
| 317 | sysbus_mmio_get_region(sbd, 0)); |
| 318 | |
| 319 | /* PMU */ |
| 320 | object_initialize_child(OBJECT(s), "pmu", &s->pmu, TYPE_VIA_PMU); |
| 321 | object_property_set_link(OBJECT(&s->pmu), "gpio", OBJECT(sbd), |
| 322 | &error_abort); |
| 323 | qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb); |
| 324 | if (!qdev_realize(DEVICE(&s->pmu), BUS(&s->macio_bus), errp)) { |
| 325 | return; |
| 326 | } |
| 327 | sbd = SYS_BUS_DEVICE(&s->pmu); |
| 328 | sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, NEWWORLD_PMU_IRQ)); |
| 329 | memory_region_add_subregion(&s->bar, 0x16000, |
| 330 | sysbus_mmio_get_region(sbd, 0)); |
| 331 | } else { |
| 332 | object_unparent(OBJECT(&ns->gpio)); |
| 333 | |
| 334 | /* CUDA */ |
| 335 | object_initialize_child(OBJECT(s), "cuda", &s->cuda, TYPE_CUDA); |
| 336 | qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency", |
| 337 | s->frequency); |
| 338 | |
| 339 | if (!qdev_realize(DEVICE(&s->cuda), BUS(&s->macio_bus), errp)) { |
| 340 | return; |
| 341 | } |
| 342 | sbd = SYS_BUS_DEVICE(&s->cuda); |
| 343 | sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(pic_dev, NEWWORLD_CUDA_IRQ)); |
| 344 | memory_region_add_subregion(&s->bar, 0x16000, |
| 345 | sysbus_mmio_get_region(sbd, 0)); |
| 346 | } |
| 347 | } |
| 348 | |
| 349 | static void macio_newworld_init(Object *obj) |
| 350 | { |
| 351 | MacIOState *s = MACIO(obj); |
| 352 | NewWorldMacIOState *ns = NEWWORLD_MACIO(obj); |
| 353 | int i; |
| 354 | |
| 355 | object_initialize_child(obj, "pic", &ns->pic, TYPE_OPENPIC); |
| 356 | |
| 357 | object_initialize_child(obj, "gpio", &ns->gpio, TYPE_MACIO_GPIO); |
| 358 | |
| 359 | for (i = 0; i < 2; i++) { |
| 360 | macio_init_ide(s, &ns->ide[i], i); |
| 361 | } |
| 362 | } |
| 363 | |
| 364 | static void macio_instance_init(Object *obj) |
| 365 | { |
| 366 | MacIOState *s = MACIO(obj); |
| 367 | |
| 368 | memory_region_init(&s->bar, obj, "macio", 0x80000); |
| 369 | |
| 370 | qbus_init(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS, |
| 371 | DEVICE(obj), "macio.0"); |
| 372 | |
| 373 | object_initialize_child(obj, "dbdma", &s->dbdma, TYPE_MAC_DBDMA); |
| 374 | |
| 375 | object_initialize_child(obj, "escc", &s->escc, TYPE_ESCC); |
| 376 | } |
| 377 | |
| 378 | static const VMStateDescription vmstate_macio_oldworld = { |
| 379 | .name = "macio-oldworld", |
| 380 | .version_id = 0, |
| 381 | .minimum_version_id = 0, |
| 382 | .fields = (const VMStateField[]) { |
| 383 | VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState), |
| 384 | VMSTATE_END_OF_LIST() |
| 385 | } |
| 386 | }; |
| 387 | |
| 388 | static void macio_oldworld_class_init(ObjectClass *oc, const void *data) |
| 389 | { |
| 390 | PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); |
| 391 | DeviceClass *dc = DEVICE_CLASS(oc); |
| 392 | |
| 393 | pdc->realize = macio_oldworld_realize; |
| 394 | pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201; |
| 395 | dc->vmsd = &vmstate_macio_oldworld; |
| 396 | } |
| 397 | |
| 398 | static const VMStateDescription vmstate_macio_newworld = { |
| 399 | .name = "macio-newworld", |
| 400 | .version_id = 0, |
| 401 | .minimum_version_id = 0, |
| 402 | .fields = (const VMStateField[]) { |
| 403 | VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState), |
| 404 | VMSTATE_END_OF_LIST() |
| 405 | } |
| 406 | }; |
| 407 | |
| 408 | static const Property macio_newworld_properties[] = { |
| 409 | DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false), |
| 410 | DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false), |
| 411 | }; |
| 412 | |
| 413 | static void macio_newworld_class_init(ObjectClass *oc, const void *data) |
| 414 | { |
| 415 | PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc); |
| 416 | DeviceClass *dc = DEVICE_CLASS(oc); |
| 417 | |
| 418 | pdc->realize = macio_newworld_realize; |
| 419 | pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL; |
| 420 | dc->vmsd = &vmstate_macio_newworld; |
| 421 | device_class_set_props(dc, macio_newworld_properties); |
| 422 | } |
| 423 | |
| 424 | static const Property macio_properties[] = { |
| 425 | DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0), |
| 426 | }; |
| 427 | |
| 428 | static void macio_class_init(ObjectClass *klass, const void *data) |
| 429 | { |
| 430 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
| 431 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 432 | |
| 433 | k->vendor_id = PCI_VENDOR_ID_APPLE; |
| 434 | k->class_id = PCI_CLASS_OTHERS << 8; |
| 435 | device_class_set_props(dc, macio_properties); |
| 436 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
| 437 | } |
| 438 | |
| 439 | static const TypeInfo macio_bus_info = { |
| 440 | .name = TYPE_MACIO_BUS, |
| 441 | .parent = TYPE_SYSTEM_BUS, |
| 442 | .instance_size = sizeof(MacIOBusState), |
| 443 | }; |
| 444 | |
| 445 | static const TypeInfo macio_oldworld_type_info = { |
| 446 | .name = TYPE_OLDWORLD_MACIO, |
| 447 | .parent = TYPE_MACIO, |
| 448 | .instance_size = sizeof(OldWorldMacIOState), |
| 449 | .instance_init = macio_oldworld_init, |
| 450 | .class_init = macio_oldworld_class_init, |
| 451 | }; |
| 452 | |
| 453 | static const TypeInfo macio_newworld_type_info = { |
| 454 | .name = TYPE_NEWWORLD_MACIO, |
| 455 | .parent = TYPE_MACIO, |
| 456 | .instance_size = sizeof(NewWorldMacIOState), |
| 457 | .instance_init = macio_newworld_init, |
| 458 | .class_init = macio_newworld_class_init, |
| 459 | }; |
| 460 | |
| 461 | static const TypeInfo macio_type_info = { |
| 462 | .name = TYPE_MACIO, |
| 463 | .parent = TYPE_PCI_DEVICE, |
| 464 | .instance_size = sizeof(MacIOState), |
| 465 | .instance_init = macio_instance_init, |
| 466 | .abstract = true, |
| 467 | .class_init = macio_class_init, |
| 468 | .interfaces = (const InterfaceInfo[]) { |
| 469 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, |
| 470 | { }, |
| 471 | }, |
| 472 | }; |
| 473 | |
| 474 | static void macio_register_types(void) |
| 475 | { |
| 476 | type_register_static(&macio_bus_info); |
| 477 | type_register_static(&macio_type_info); |
| 478 | type_register_static(&macio_oldworld_type_info); |
| 479 | type_register_static(&macio_newworld_type_info); |
| 480 | } |
| 481 | |
| 482 | type_init(macio_register_types) |