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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*******************************************************************************
3 *
4 * CTU CAN FD IP Core
5 *
6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
7 * Copyright (C) 2018-2020 Ondrej Ille <ondrej.ille@gmail.com> self-funded
8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
9 * Copyright (C) 2018-2020 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
10 *
11 * Project advisors:
12 * Jiri Novak <jnovak@fel.cvut.cz>
13 * Pavel Pisa <pisa@cmp.felk.cvut.cz>
14 *
15 * Department of Measurement (http://meas.fel.cvut.cz/)
16 * Faculty of Electrical Engineering (http://www.fel.cvut.cz)
17 * Czech Technical University (http://www.cvut.cz/)
18 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version 2
22 * of the License, or (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
28 ******************************************************************************/
29
30 /* This file is autogenerated, DO NOT EDIT! */
31
32 #ifndef HW_CAN_CTU_CAN_FD_FRAME_H
33 #define HW_CAN_CTU_CAN_FD_FRAME_H
34
35 /* CAN_Frame_format memory map */
36 enum ctu_can_fd_can_frame_format {
37 CTU_CAN_FD_FRAME_FORM_W = 0x0,
38 CTU_CAN_FD_IDENTIFIER_W = 0x4,
39 CTU_CAN_FD_TIMESTAMP_L_W = 0x8,
40 CTU_CAN_FD_TIMESTAMP_U_W = 0xc,
41 CTU_CAN_FD_DATA_1_4_W = 0x10,
42 CTU_CAN_FD_DATA_5_8_W = 0x14,
43 CTU_CAN_FD_DATA_61_64_W = 0x4c,
44 };
45
46
47 /* Register descriptions: */
48 union ctu_can_fd_frame_form_w {
49 uint32_t u32;
50 struct ctu_can_fd_frame_form_w_s {
51 #ifdef __LITTLE_ENDIAN_BITFIELD
52 /* FRAME_FORM_W */
53 uint32_t dlc : 4;
54 uint32_t reserved_4 : 1;
55 uint32_t rtr : 1;
56 uint32_t ide : 1;
57 uint32_t fdf : 1;
58 uint32_t reserved_8 : 1;
59 uint32_t brs : 1;
60 uint32_t esi_rsv : 1;
61 uint32_t rwcnt : 5;
62 uint32_t reserved_31_16 : 16;
63 #else
64 uint32_t reserved_31_16 : 16;
65 uint32_t rwcnt : 5;
66 uint32_t esi_rsv : 1;
67 uint32_t brs : 1;
68 uint32_t reserved_8 : 1;
69 uint32_t fdf : 1;
70 uint32_t ide : 1;
71 uint32_t rtr : 1;
72 uint32_t reserved_4 : 1;
73 uint32_t dlc : 4;
74 #endif
75 } s;
76 };
77
78 enum ctu_can_fd_frame_form_w_rtr {
79 NO_RTR_FRAME = 0x0,
80 RTR_FRAME = 0x1,
81 };
82
83 enum ctu_can_fd_frame_form_w_ide {
84 BASE = 0x0,
85 EXTENDED = 0x1,
86 };
87
88 enum ctu_can_fd_frame_form_w_fdf {
89 NORMAL_CAN = 0x0,
90 FD_CAN = 0x1,
91 };
92
93 enum ctu_can_fd_frame_form_w_brs {
94 BR_NO_SHIFT = 0x0,
95 BR_SHIFT = 0x1,
96 };
97
98 enum ctu_can_fd_frame_form_w_esi_rsv {
99 ESI_ERR_ACTIVE = 0x0,
100 ESI_ERR_PASIVE = 0x1,
101 };
102
103 union ctu_can_fd_identifier_w {
104 uint32_t u32;
105 struct ctu_can_fd_identifier_w_s {
106 #ifdef __LITTLE_ENDIAN_BITFIELD
107 /* IDENTIFIER_W */
108 uint32_t identifier_ext : 18;
109 uint32_t identifier_base : 11;
110 uint32_t reserved_31_29 : 3;
111 #else
112 uint32_t reserved_31_29 : 3;
113 uint32_t identifier_base : 11;
114 uint32_t identifier_ext : 18;
115 #endif
116 } s;
117 };
118
119 union ctu_can_fd_timestamp_l_w {
120 uint32_t u32;
121 struct ctu_can_fd_timestamp_l_w_s {
122 /* TIMESTAMP_L_W */
123 uint32_t time_stamp_31_0 : 32;
124 } s;
125 };
126
127 union ctu_can_fd_timestamp_u_w {
128 uint32_t u32;
129 struct ctu_can_fd_timestamp_u_w_s {
130 /* TIMESTAMP_U_W */
131 uint32_t timestamp_l_w : 32;
132 } s;
133 };
134
135 union ctu_can_fd_data_1_4_w {
136 uint32_t u32;
137 struct ctu_can_fd_data_1_4_w_s {
138 #ifdef __LITTLE_ENDIAN_BITFIELD
139 /* DATA_1_4_W */
140 uint32_t data_1 : 8;
141 uint32_t data_2 : 8;
142 uint32_t data_3 : 8;
143 uint32_t data_4 : 8;
144 #else
145 uint32_t data_4 : 8;
146 uint32_t data_3 : 8;
147 uint32_t data_2 : 8;
148 uint32_t data_1 : 8;
149 #endif
150 } s;
151 };
152
153 union ctu_can_fd_data_5_8_w {
154 uint32_t u32;
155 struct ctu_can_fd_data_5_8_w_s {
156 #ifdef __LITTLE_ENDIAN_BITFIELD
157 /* DATA_5_8_W */
158 uint32_t data_5 : 8;
159 uint32_t data_6 : 8;
160 uint32_t data_7 : 8;
161 uint32_t data_8 : 8;
162 #else
163 uint32_t data_8 : 8;
164 uint32_t data_7 : 8;
165 uint32_t data_6 : 8;
166 uint32_t data_5 : 8;
167 #endif
168 } s;
169 };
170
171 union ctu_can_fd_data_61_64_w {
172 uint32_t u32;
173 struct ctu_can_fd_data_61_64_w_s {
174 #ifdef __LITTLE_ENDIAN_BITFIELD
175 /* DATA_61_64_W */
176 uint32_t data_61 : 8;
177 uint32_t data_62 : 8;
178 uint32_t data_63 : 8;
179 uint32_t data_64 : 8;
180 #else
181 uint32_t data_64 : 8;
182 uint32_t data_63 : 8;
183 uint32_t data_62 : 8;
184 uint32_t data_61 : 8;
185 #endif
186 } s;
187 };
188
189 #endif