| 1 | #ifndef HW_I82596_H |
| 2 | #define HW_I82596_H |
| 3 | |
| 4 | #define I82596_IOPORT_SIZE 0x20 |
| 5 | |
| 6 | #include "system/memory.h" |
| 7 | #include "system/address-spaces.h" |
| 8 | |
| 9 | #define PACKET_QUEUE_SIZE 64 |
| 10 | #define RX_RING_SIZE 16 |
| 11 | #define PKT_BUF_SZ 1536 |
| 12 | |
| 13 | #define PORT_RESET 0x00 |
| 14 | #define PORT_SELFTEST 0x01 |
| 15 | #define PORT_ALTSCP 0x02 |
| 16 | #define PORT_ALTDUMP 0x03 |
| 17 | #define PORT_CA 0x10 |
| 18 | |
| 19 | typedef struct I82596State_st I82596State; |
| 20 | |
| 21 | struct I82596State_st { |
| 22 | MemoryRegion mmio; |
| 23 | MemoryRegion *as; |
| 24 | qemu_irq irq; |
| 25 | NICState *nic; |
| 26 | NICConf conf; |
| 27 | QEMUTimer *flush_queue_timer; |
| 28 | uint8_t mode; |
| 29 | |
| 30 | QEMUTimer *throttle_timer; |
| 31 | uint16_t t_on; |
| 32 | uint16_t t_off; |
| 33 | bool throttle_state; |
| 34 | |
| 35 | hwaddr scp; |
| 36 | uint32_t iscp; |
| 37 | uint8_t sysbus; |
| 38 | uint32_t scb; |
| 39 | uint32_t scb_base; |
| 40 | uint16_t scb_status; |
| 41 | uint8_t cu_status, rx_status; |
| 42 | uint16_t lnkst; |
| 43 | uint32_t last_tx_len; |
| 44 | uint32_t collision_events; |
| 45 | uint32_t total_collisions; |
| 46 | |
| 47 | uint32_t tx_retry_addr; |
| 48 | int tx_retry_count; |
| 49 | uint32_t tx_good_frames; |
| 50 | uint32_t tx_collisions; |
| 51 | uint32_t tx_aborted_errors; |
| 52 | |
| 53 | uint32_t cmd_p; |
| 54 | int ca; |
| 55 | int ca_active; |
| 56 | int send_irq; |
| 57 | |
| 58 | uint8_t mult[8]; |
| 59 | uint8_t config[14]; |
| 60 | |
| 61 | uint32_t crc_err; |
| 62 | uint32_t align_err; |
| 63 | uint32_t resource_err; |
| 64 | uint32_t over_err; |
| 65 | uint32_t rcvdt_err; |
| 66 | uint32_t short_fr_error; |
| 67 | uint32_t total_frames; |
| 68 | uint32_t total_good_frames; |
| 69 | |
| 70 | uint8_t tx_buffer[PKT_BUF_SZ]; |
| 71 | uint8_t rx_buffer[PKT_BUF_SZ]; |
| 72 | uint16_t tx_frame_len; |
| 73 | uint16_t rx_frame_len; |
| 74 | |
| 75 | hwaddr current_tx_desc; |
| 76 | hwaddr current_rx_desc; |
| 77 | uint32_t last_good_rfa; |
| 78 | uint8_t packet_queue[PACKET_QUEUE_SIZE][PKT_BUF_SZ]; |
| 79 | size_t packet_queue_len[PACKET_QUEUE_SIZE]; |
| 80 | int queue_head; |
| 81 | int queue_tail; |
| 82 | int queue_count; |
| 83 | bool rnr_signaled; |
| 84 | bool flushing_queue; |
| 85 | }; |
| 86 | |
| 87 | void i82596_h_reset(void *opaque); |
| 88 | void i82596_ioport_writew(void *opaque, uint32_t addr, uint32_t val); |
| 89 | uint32_t i82596_ioport_readw(void *opaque, uint32_t addr); |
| 90 | ssize_t i82596_receive(NetClientState *nc, const uint8_t *buf, size_t size_); |
| 91 | ssize_t i82596_receive_iov(NetClientState *nc, const struct iovec *iov, |
| 92 | int iovcnt); |
| 93 | bool i82596_can_receive(NetClientState *nc); |
| 94 | void i82596_set_link_status(NetClientState *nc); |
| 95 | void i82596_poll(NetClientState *nc, bool enable); |
| 96 | void i82596_common_init(DeviceState *dev, I82596State *s, |
| 97 | NetClientInfo *info); |
| 98 | extern const VMStateDescription vmstate_i82596; |
| 99 | #endif |