| 1 | /* |
| 2 | * QEMU sPAPR NVRAM emulation |
| 3 | * |
| 4 | * Copyright (C) 2012 David Gibson, IBM Corporation. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #include "qemu/osdep.h" |
| 26 | #include "qemu/module.h" |
| 27 | #include "qemu/units.h" |
| 28 | #include "qapi/error.h" |
| 29 | #include <libfdt.h> |
| 30 | |
| 31 | #include "system/block-backend.h" |
| 32 | #include "system/device_tree.h" |
| 33 | #include "system/physmem.h" |
| 34 | #include "system/system.h" |
| 35 | #include "system/runstate.h" |
| 36 | #include "migration/vmstate.h" |
| 37 | #include "hw/nvram/chrp_nvram.h" |
| 38 | #include "hw/ppc/spapr.h" |
| 39 | #include "hw/ppc/spapr_vio.h" |
| 40 | #include "hw/core/qdev-properties.h" |
| 41 | #include "hw/core/qdev-properties-system.h" |
| 42 | #include "exec/cpu-common.h" |
| 43 | #include "qom/object.h" |
| 44 | |
| 45 | struct SpaprNvram { |
| 46 | SpaprVioDevice sdev; |
| 47 | uint32_t size; |
| 48 | uint8_t *buf; |
| 49 | BlockBackend *blk; |
| 50 | VMChangeStateEntry *vmstate; |
| 51 | }; |
| 52 | |
| 53 | #define TYPE_VIO_SPAPR_NVRAM "spapr-nvram" |
| 54 | OBJECT_DECLARE_SIMPLE_TYPE(SpaprNvram, VIO_SPAPR_NVRAM) |
| 55 | |
| 56 | #define MIN_NVRAM_SIZE (8 * KiB) |
| 57 | #define DEFAULT_NVRAM_SIZE (64 * KiB) |
| 58 | #define MAX_NVRAM_SIZE (1 * MiB) |
| 59 | |
| 60 | static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachineState *spapr, |
| 61 | uint32_t token, uint32_t nargs, |
| 62 | target_ulong args, |
| 63 | uint32_t nret, target_ulong rets) |
| 64 | { |
| 65 | SpaprNvram *nvram = spapr->nvram; |
| 66 | hwaddr offset, buffer, len; |
| 67 | void *membuf; |
| 68 | |
| 69 | if ((nargs != 3) || (nret != 2)) { |
| 70 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
| 71 | return; |
| 72 | } |
| 73 | |
| 74 | if (!nvram) { |
| 75 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
| 76 | rtas_st(rets, 1, 0); |
| 77 | return; |
| 78 | } |
| 79 | |
| 80 | offset = rtas_ld(args, 0); |
| 81 | buffer = rtas_ld(args, 1); |
| 82 | len = rtas_ld(args, 2); |
| 83 | |
| 84 | if (((offset + len) < offset) |
| 85 | || ((offset + len) > nvram->size)) { |
| 86 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
| 87 | rtas_st(rets, 1, 0); |
| 88 | return; |
| 89 | } |
| 90 | |
| 91 | assert(nvram->buf); |
| 92 | |
| 93 | membuf = physical_memory_map(buffer, &len, true); |
| 94 | memcpy(membuf, nvram->buf + offset, len); |
| 95 | physical_memory_unmap(membuf, len, 1, len); |
| 96 | |
| 97 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
| 98 | rtas_st(rets, 1, len); |
| 99 | } |
| 100 | |
| 101 | static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr, |
| 102 | uint32_t token, uint32_t nargs, |
| 103 | target_ulong args, |
| 104 | uint32_t nret, target_ulong rets) |
| 105 | { |
| 106 | SpaprNvram *nvram = spapr->nvram; |
| 107 | hwaddr offset, buffer, len; |
| 108 | int ret; |
| 109 | void *membuf; |
| 110 | |
| 111 | if ((nargs != 3) || (nret != 2)) { |
| 112 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
| 113 | return; |
| 114 | } |
| 115 | |
| 116 | if (!nvram) { |
| 117 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
| 118 | return; |
| 119 | } |
| 120 | |
| 121 | offset = rtas_ld(args, 0); |
| 122 | buffer = rtas_ld(args, 1); |
| 123 | len = rtas_ld(args, 2); |
| 124 | |
| 125 | if (((offset + len) < offset) |
| 126 | || ((offset + len) > nvram->size)) { |
| 127 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
| 128 | return; |
| 129 | } |
| 130 | |
| 131 | membuf = physical_memory_map(buffer, &len, false); |
| 132 | |
| 133 | ret = 0; |
| 134 | if (nvram->blk) { |
| 135 | ret = blk_pwrite(nvram->blk, offset, len, membuf, 0); |
| 136 | } |
| 137 | |
| 138 | assert(nvram->buf); |
| 139 | memcpy(nvram->buf + offset, membuf, len); |
| 140 | |
| 141 | physical_memory_unmap(membuf, len, 0, len); |
| 142 | |
| 143 | rtas_st(rets, 0, (ret < 0) ? RTAS_OUT_HW_ERROR : RTAS_OUT_SUCCESS); |
| 144 | rtas_st(rets, 1, (ret < 0) ? 0 : len); |
| 145 | } |
| 146 | |
| 147 | static void spapr_nvram_realize(SpaprVioDevice *dev, Error **errp) |
| 148 | { |
| 149 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(dev); |
| 150 | int ret; |
| 151 | |
| 152 | if (nvram->blk) { |
| 153 | int64_t len = blk_getlength(nvram->blk); |
| 154 | |
| 155 | if (len < 0) { |
| 156 | error_setg_errno(errp, -len, |
| 157 | "could not get length of backing image"); |
| 158 | return; |
| 159 | } |
| 160 | |
| 161 | nvram->size = len; |
| 162 | |
| 163 | ret = blk_set_perm(nvram->blk, |
| 164 | BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE, |
| 165 | BLK_PERM_ALL, errp); |
| 166 | if (ret < 0) { |
| 167 | return; |
| 168 | } |
| 169 | } else { |
| 170 | nvram->size = DEFAULT_NVRAM_SIZE; |
| 171 | } |
| 172 | |
| 173 | nvram->buf = g_malloc0(nvram->size); |
| 174 | |
| 175 | if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) { |
| 176 | error_setg(errp, |
| 177 | "spapr-nvram must be between %" PRId64 |
| 178 | " and %" PRId64 " bytes in size", |
| 179 | MIN_NVRAM_SIZE, MAX_NVRAM_SIZE); |
| 180 | return; |
| 181 | } |
| 182 | |
| 183 | if (nvram->blk) { |
| 184 | ret = blk_pread(nvram->blk, 0, nvram->size, nvram->buf, 0); |
| 185 | |
| 186 | if (ret < 0) { |
| 187 | error_setg(errp, "can't read spapr-nvram contents"); |
| 188 | return; |
| 189 | } |
| 190 | } else if (nb_prom_envs > 0) { |
| 191 | /* Create a system partition to pass the -prom-env variables */ |
| 192 | chrp_nvram_create_system_partition(nvram->buf, MIN_NVRAM_SIZE / 4, |
| 193 | nvram->size); |
| 194 | chrp_nvram_create_free_partition(&nvram->buf[MIN_NVRAM_SIZE / 4], |
| 195 | nvram->size - MIN_NVRAM_SIZE / 4); |
| 196 | } |
| 197 | |
| 198 | spapr_rtas_register(RTAS_NVRAM_FETCH, "nvram-fetch", rtas_nvram_fetch); |
| 199 | spapr_rtas_register(RTAS_NVRAM_STORE, "nvram-store", rtas_nvram_store); |
| 200 | } |
| 201 | |
| 202 | static int spapr_nvram_devnode(SpaprVioDevice *dev, void *fdt, int node_off) |
| 203 | { |
| 204 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(dev); |
| 205 | |
| 206 | return fdt_setprop_cell(fdt, node_off, "#bytes", nvram->size); |
| 207 | } |
| 208 | |
| 209 | static int spapr_nvram_pre_load(void *opaque) |
| 210 | { |
| 211 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(opaque); |
| 212 | |
| 213 | g_free(nvram->buf); |
| 214 | nvram->buf = NULL; |
| 215 | nvram->size = 0; |
| 216 | |
| 217 | return 0; |
| 218 | } |
| 219 | |
| 220 | static void postload_update_cb(void *opaque, bool running, RunState state) |
| 221 | { |
| 222 | SpaprNvram *nvram = opaque; |
| 223 | |
| 224 | /* This is called after bdrv_activate_all. */ |
| 225 | |
| 226 | qemu_del_vm_change_state_handler(nvram->vmstate); |
| 227 | nvram->vmstate = NULL; |
| 228 | |
| 229 | blk_pwrite(nvram->blk, 0, nvram->size, nvram->buf, 0); |
| 230 | } |
| 231 | |
| 232 | static int spapr_nvram_post_load(void *opaque, int version_id) |
| 233 | { |
| 234 | SpaprNvram *nvram = VIO_SPAPR_NVRAM(opaque); |
| 235 | |
| 236 | if (nvram->blk) { |
| 237 | nvram->vmstate = qemu_add_vm_change_state_handler(postload_update_cb, |
| 238 | nvram); |
| 239 | } |
| 240 | |
| 241 | return 0; |
| 242 | } |
| 243 | |
| 244 | static const VMStateDescription vmstate_spapr_nvram = { |
| 245 | .name = "spapr_nvram", |
| 246 | .version_id = 1, |
| 247 | .minimum_version_id = 1, |
| 248 | .pre_load = spapr_nvram_pre_load, |
| 249 | .post_load = spapr_nvram_post_load, |
| 250 | .fields = (const VMStateField[]) { |
| 251 | VMSTATE_UINT32(size, SpaprNvram), |
| 252 | VMSTATE_VBUFFER_ALLOC_UINT32(buf, SpaprNvram, 1, NULL, size), |
| 253 | VMSTATE_END_OF_LIST() |
| 254 | }, |
| 255 | }; |
| 256 | |
| 257 | static const Property spapr_nvram_properties[] = { |
| 258 | DEFINE_SPAPR_PROPERTIES(SpaprNvram, sdev), |
| 259 | DEFINE_PROP_DRIVE("drive", SpaprNvram, blk), |
| 260 | }; |
| 261 | |
| 262 | static void spapr_nvram_class_init(ObjectClass *klass, const void *data) |
| 263 | { |
| 264 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 265 | SpaprVioDeviceClass *k = VIO_SPAPR_DEVICE_CLASS(klass); |
| 266 | |
| 267 | k->realize = spapr_nvram_realize; |
| 268 | k->devnode = spapr_nvram_devnode; |
| 269 | k->dt_name = "nvram"; |
| 270 | k->dt_type = "nvram"; |
| 271 | k->dt_compatible = "qemu,spapr-nvram"; |
| 272 | set_bit(DEVICE_CATEGORY_MISC, dc->categories); |
| 273 | device_class_set_props(dc, spapr_nvram_properties); |
| 274 | dc->vmsd = &vmstate_spapr_nvram; |
| 275 | /* Reason: Internal device only, uses spapr_rtas_register() in realize() */ |
| 276 | dc->user_creatable = false; |
| 277 | } |
| 278 | |
| 279 | static const TypeInfo spapr_nvram_type_info = { |
| 280 | .name = TYPE_VIO_SPAPR_NVRAM, |
| 281 | .parent = TYPE_VIO_SPAPR_DEVICE, |
| 282 | .instance_size = sizeof(SpaprNvram), |
| 283 | .class_init = spapr_nvram_class_init, |
| 284 | }; |
| 285 | |
| 286 | static void spapr_nvram_register_types(void) |
| 287 | { |
| 288 | type_register_static(&spapr_nvram_type_info); |
| 289 | } |
| 290 | |
| 291 | type_init(spapr_nvram_register_types) |