| 1 | /* |
| 2 | * HMP commands related to PCI |
| 3 | * |
| 4 | * Copyright IBM, Corp. 2011 |
| 5 | * |
| 6 | * Authors: |
| 7 | * Anthony Liguori <aliguori@us.ibm.com> |
| 8 | * |
| 9 | * This work is licensed under the terms of the GNU GPL, version 2. See |
| 10 | * the COPYING file in the top-level directory. |
| 11 | * |
| 12 | * Contributions after 2012-01-13 are licensed under the terms of the |
| 13 | * GNU GPL, version 2 or (at your option) any later version. |
| 14 | */ |
| 15 | |
| 16 | #include "qemu/osdep.h" |
| 17 | #include "hw/pci/pci.h" |
| 18 | #include "hw/pci/pci_device.h" |
| 19 | #include "monitor/hmp.h" |
| 20 | #include "monitor/monitor.h" |
| 21 | #include "pci-internal.h" |
| 22 | #include "qapi/error.h" |
| 23 | #include "qobject/qdict.h" |
| 24 | #include "qapi/qapi-commands-pci.h" |
| 25 | #include "qemu/cutils.h" |
| 26 | |
| 27 | static void hmp_info_pci_device(MonitorHMP *hmp, const PciDeviceInfo *dev) |
| 28 | { |
| 29 | Monitor *mon = MONITOR(hmp); |
| 30 | PciMemoryRegionList *region; |
| 31 | |
| 32 | monitor_hmp_printf(hmp, " Bus %2" PRId64 ", ", dev->bus); |
| 33 | monitor_hmp_printf(hmp, "device %3" PRId64 ", function %" PRId64 ":\n", |
| 34 | dev->slot, dev->function); |
| 35 | monitor_hmp_printf(hmp, " "); |
| 36 | |
| 37 | if (dev->class_info->desc) { |
| 38 | monitor_puts(mon, dev->class_info->desc); |
| 39 | } else { |
| 40 | monitor_hmp_printf(hmp, "Class %04" PRId64, dev->class_info->q_class); |
| 41 | } |
| 42 | |
| 43 | monitor_hmp_printf(hmp, ": PCI device %04" PRIx64 ":%04" PRIx64 "\n", |
| 44 | dev->id->vendor, dev->id->device); |
| 45 | if (dev->id->has_subsystem_vendor && dev->id->has_subsystem) { |
| 46 | monitor_hmp_printf(hmp, " PCI subsystem %04" PRIx64 ":%04" PRIx64 "\n", |
| 47 | dev->id->subsystem_vendor, dev->id->subsystem); |
| 48 | } |
| 49 | |
| 50 | if (dev->has_irq) { |
| 51 | monitor_hmp_printf(hmp, " IRQ %" PRId64 ", pin %c\n", |
| 52 | dev->irq, (char)('A' + dev->irq_pin - 1)); |
| 53 | } |
| 54 | |
| 55 | if (dev->pci_bridge) { |
| 56 | monitor_hmp_printf(hmp, " BUS %" PRId64 ".\n", |
| 57 | dev->pci_bridge->bus->number); |
| 58 | monitor_hmp_printf(hmp, " secondary bus %" PRId64 ".\n", |
| 59 | dev->pci_bridge->bus->secondary); |
| 60 | monitor_hmp_printf(hmp, " subordinate bus %" PRId64 ".\n", |
| 61 | dev->pci_bridge->bus->subordinate); |
| 62 | |
| 63 | monitor_hmp_printf(hmp, " IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n", |
| 64 | dev->pci_bridge->bus->io_range->base, |
| 65 | dev->pci_bridge->bus->io_range->limit); |
| 66 | |
| 67 | monitor_hmp_printf(hmp, |
| 68 | " memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n", |
| 69 | dev->pci_bridge->bus->memory_range->base, |
| 70 | dev->pci_bridge->bus->memory_range->limit); |
| 71 | |
| 72 | monitor_hmp_printf(hmp, " prefetchable memory range " |
| 73 | "[0x%08"PRIx64", 0x%08"PRIx64"]\n", |
| 74 | dev->pci_bridge->bus->prefetchable_range->base, |
| 75 | dev->pci_bridge->bus->prefetchable_range->limit); |
| 76 | } |
| 77 | |
| 78 | for (region = dev->regions; region; region = region->next) { |
| 79 | uint64_t addr, size; |
| 80 | |
| 81 | addr = region->value->address; |
| 82 | size = region->value->size; |
| 83 | |
| 84 | monitor_hmp_printf(hmp, " BAR%" PRId64 ": ", region->value->bar); |
| 85 | |
| 86 | if (!strcmp(region->value->type, "io")) { |
| 87 | if (addr != PCI_BAR_UNMAPPED) { |
| 88 | monitor_hmp_printf(hmp, "I/O at 0x%04" PRIx64 |
| 89 | " [0x%04" PRIx64 "]\n", |
| 90 | addr, addr + size - 1); |
| 91 | } else { |
| 92 | monitor_hmp_printf(hmp, "I/O (not mapped)\n"); |
| 93 | } |
| 94 | } else { |
| 95 | if (addr != PCI_BAR_UNMAPPED) { |
| 96 | monitor_hmp_printf(hmp, "%d bit%s memory at 0x%08" PRIx64 |
| 97 | " [0x%08" PRIx64 "]\n", |
| 98 | region->value->mem_type_64 ? 64 : 32, |
| 99 | region->value->prefetch ? " prefetchable" : "", |
| 100 | addr, addr + size - 1); |
| 101 | } else { |
| 102 | monitor_hmp_printf(hmp, "%d bit%s memory (not mapped)\n", |
| 103 | region->value->mem_type_64 ? 64 : 32, |
| 104 | region->value->prefetch ? " prefetchable" : ""); |
| 105 | } |
| 106 | } |
| 107 | } |
| 108 | |
| 109 | monitor_hmp_printf(hmp, " id \"%s\"\n", dev->qdev_id); |
| 110 | |
| 111 | if (dev->pci_bridge) { |
| 112 | if (dev->pci_bridge->has_devices) { |
| 113 | PciDeviceInfoList *cdev; |
| 114 | for (cdev = dev->pci_bridge->devices; cdev; cdev = cdev->next) { |
| 115 | hmp_info_pci_device(hmp, cdev->value); |
| 116 | } |
| 117 | } |
| 118 | } |
| 119 | } |
| 120 | |
| 121 | void hmp_info_pci(MonitorHMP *hmp, const QDict *qdict) |
| 122 | { |
| 123 | PciInfoList *info_list, *info; |
| 124 | |
| 125 | info_list = qmp_query_pci(&error_abort); |
| 126 | |
| 127 | for (info = info_list; info; info = info->next) { |
| 128 | PciDeviceInfoList *dev; |
| 129 | |
| 130 | for (dev = info->value->devices; dev; dev = dev->next) { |
| 131 | hmp_info_pci_device(hmp, dev->value); |
| 132 | } |
| 133 | } |
| 134 | |
| 135 | qapi_free_PciInfoList(info_list); |
| 136 | } |
| 137 | |
| 138 | #ifdef CONFIG_HMP |
| 139 | void pcibus_dev_print(MonitorHMP *hmp, DeviceState *dev, int indent) |
| 140 | { |
| 141 | PCIDevice *d = (PCIDevice *)dev; |
| 142 | int class = pci_get_word(d->config + PCI_CLASS_DEVICE); |
| 143 | const pci_class_desc *desc = get_class_desc(class); |
| 144 | char ctxt[64]; |
| 145 | PCIIORegion *r; |
| 146 | int i; |
| 147 | |
| 148 | if (desc->desc) { |
| 149 | snprintf(ctxt, sizeof(ctxt), "%s", desc->desc); |
| 150 | } else { |
| 151 | snprintf(ctxt, sizeof(ctxt), "Class %04x", class); |
| 152 | } |
| 153 | |
| 154 | monitor_hmp_printf(hmp, "%*sclass %s, addr %02x:%02x.%x, " |
| 155 | "pci id %04x:%04x (sub %04x:%04x)\n", |
| 156 | indent, "", ctxt, pci_dev_bus_num(d), |
| 157 | PCI_SLOT(d->devfn), PCI_FUNC(d->devfn), |
| 158 | pci_get_word(d->config + PCI_VENDOR_ID), |
| 159 | pci_get_word(d->config + PCI_DEVICE_ID), |
| 160 | pci_get_word(d->config + PCI_SUBSYSTEM_VENDOR_ID), |
| 161 | pci_get_word(d->config + PCI_SUBSYSTEM_ID)); |
| 162 | for (i = 0; i < PCI_NUM_REGIONS; i++) { |
| 163 | r = &d->io_regions[i]; |
| 164 | if (!r->size) { |
| 165 | continue; |
| 166 | } |
| 167 | monitor_hmp_printf(hmp, "%*sbar %d: %s at 0x%"FMT_PCIBUS |
| 168 | " [0x%"FMT_PCIBUS"]\n", |
| 169 | indent, "", |
| 170 | i, r->type & PCI_BASE_ADDRESS_SPACE_IO ? "i/o" : "mem", |
| 171 | r->addr, r->addr + r->size - 1); |
| 172 | } |
| 173 | } |
| 174 | #endif |
| 175 | |
| 176 | void hmp_pcie_aer_inject_error(MonitorHMP *hmp, const QDict *qdict) |
| 177 | { |
| 178 | Error *err = NULL; |
| 179 | const char *id = qdict_get_str(qdict, "id"); |
| 180 | const char *error_name; |
| 181 | uint32_t error_status; |
| 182 | unsigned int num; |
| 183 | bool correctable; |
| 184 | PCIDevice *dev; |
| 185 | PCIEAERErr aer_err; |
| 186 | int ret; |
| 187 | |
| 188 | ret = pci_qdev_find_device(id, &dev); |
| 189 | if (ret == -ENODEV) { |
| 190 | error_setg(&err, "device '%s' not found", id); |
| 191 | goto out; |
| 192 | } |
| 193 | if (ret < 0 || !pci_is_express(dev)) { |
| 194 | error_setg(&err, "device '%s' is not a PCIe device", id); |
| 195 | goto out; |
| 196 | } |
| 197 | |
| 198 | error_name = qdict_get_str(qdict, "error_status"); |
| 199 | if (pcie_aer_parse_error_string(error_name, &error_status, &correctable)) { |
| 200 | if (qemu_strtoui(error_name, NULL, 0, &num) < 0) { |
| 201 | error_setg(&err, "invalid error status value '%s'", error_name); |
| 202 | goto out; |
| 203 | } |
| 204 | error_status = num; |
| 205 | correctable = qdict_get_try_bool(qdict, "correctable", false); |
| 206 | } else { |
| 207 | if (qdict_haskey(qdict, "correctable")) { |
| 208 | error_setg(&err, "-c is only valid with numeric error status"); |
| 209 | goto out; |
| 210 | } |
| 211 | } |
| 212 | aer_err.status = error_status; |
| 213 | aer_err.source_id = pci_requester_id(dev); |
| 214 | |
| 215 | aer_err.flags = 0; |
| 216 | if (correctable) { |
| 217 | aer_err.flags |= PCIE_AER_ERR_IS_CORRECTABLE; |
| 218 | } |
| 219 | if (qdict_get_try_bool(qdict, "advisory_non_fatal", false)) { |
| 220 | aer_err.flags |= PCIE_AER_ERR_MAYBE_ADVISORY; |
| 221 | } |
| 222 | if (qdict_haskey(qdict, "header0")) { |
| 223 | aer_err.flags |= PCIE_AER_ERR_HEADER_VALID; |
| 224 | } |
| 225 | if (qdict_haskey(qdict, "prefix0")) { |
| 226 | aer_err.flags |= PCIE_AER_ERR_TLP_PREFIX_PRESENT; |
| 227 | } |
| 228 | |
| 229 | aer_err.header[0] = qdict_get_try_int(qdict, "header0", 0); |
| 230 | aer_err.header[1] = qdict_get_try_int(qdict, "header1", 0); |
| 231 | aer_err.header[2] = qdict_get_try_int(qdict, "header2", 0); |
| 232 | aer_err.header[3] = qdict_get_try_int(qdict, "header3", 0); |
| 233 | |
| 234 | aer_err.prefix[0] = qdict_get_try_int(qdict, "prefix0", 0); |
| 235 | aer_err.prefix[1] = qdict_get_try_int(qdict, "prefix1", 0); |
| 236 | aer_err.prefix[2] = qdict_get_try_int(qdict, "prefix2", 0); |
| 237 | aer_err.prefix[3] = qdict_get_try_int(qdict, "prefix3", 0); |
| 238 | |
| 239 | ret = pcie_aer_inject_error(dev, &aer_err); |
| 240 | if (ret < 0) { |
| 241 | error_setg_errno(&err, -ret, "failed to inject error"); |
| 242 | goto out; |
| 243 | } |
| 244 | |
| 245 | |
| 246 | monitor_hmp_printf(hmp, "OK id: %s root bus: %s, bus: %x devfn: %x.%x\n", |
| 247 | id, pci_root_bus_path(dev), pci_dev_bus_num(dev), |
| 248 | PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); |
| 249 | |
| 250 | out: |
| 251 | hmp_handle_error(hmp, err); |
| 252 | } |