| 1 | #ifndef PPCE500_H |
| 2 | #define PPCE500_H |
| 3 | |
| 4 | #include "hw/core/boards.h" |
| 5 | #include "hw/core/platform-bus.h" |
| 6 | #include "qom/object.h" |
| 7 | |
| 8 | #define PLATFORM_CLK_FREQ_HZ (400 * 1000 * 1000) |
| 9 | |
| 10 | struct PPCE500MachineState { |
| 11 | /*< private >*/ |
| 12 | MachineState parent_obj; |
| 13 | |
| 14 | /* points to instance of TYPE_PLATFORM_BUS_DEVICE if |
| 15 | * board supports dynamic sysbus devices |
| 16 | */ |
| 17 | PlatformBusDevice *pbus_dev; |
| 18 | }; |
| 19 | |
| 20 | struct PPCE500MachineClass { |
| 21 | /*< private >*/ |
| 22 | MachineClass parent_class; |
| 23 | |
| 24 | /* required -- must at least add toplevel board compatible */ |
| 25 | void (*fixup_devtree)(void *fdt); |
| 26 | |
| 27 | int pci_first_slot; |
| 28 | int pci_nr_slots; |
| 29 | |
| 30 | int mpic_version; |
| 31 | bool has_mpc8xxx_gpio; |
| 32 | bool has_esdhc; |
| 33 | hwaddr platform_bus_base; |
| 34 | hwaddr platform_bus_size; |
| 35 | int platform_bus_first_irq; |
| 36 | int platform_bus_num_irqs; |
| 37 | hwaddr ccsrbar_base; |
| 38 | hwaddr pci_pio_base; |
| 39 | hwaddr pci_mmio_base; |
| 40 | hwaddr pci_mmio_bus_base; |
| 41 | hwaddr spin_base; |
| 42 | uint32_t clock_freq; |
| 43 | uint32_t bus_freq; |
| 44 | uint32_t tb_freq; |
| 45 | }; |
| 46 | |
| 47 | void ppce500_init(MachineState *machine); |
| 48 | |
| 49 | #define TYPE_PPCE500_MACHINE "ppce500-base-machine" |
| 50 | OBJECT_DECLARE_TYPE(PPCE500MachineState, PPCE500MachineClass, PPCE500_MACHINE) |
| 51 | |
| 52 | #endif |