| 1 | /* |
| 2 | * QEMU PowerPC e500v2 ePAPR spinning code |
| 3 | * |
| 4 | * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved. |
| 5 | * |
| 6 | * Author: Alexander Graf, <agraf@suse.de> |
| 7 | * |
| 8 | * This library is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU Lesser General Public |
| 10 | * License as published by the Free Software Foundation; either |
| 11 | * version 2.1 of the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This library is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 16 | * Lesser General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU Lesser General Public |
| 19 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
| 20 | * |
| 21 | * This code is not really a device, but models an interface that usually |
| 22 | * firmware takes care of. It's used when QEMU plays the role of firmware. |
| 23 | * |
| 24 | * Specification: |
| 25 | * |
| 26 | * https://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.1.pdf |
| 27 | * |
| 28 | */ |
| 29 | |
| 30 | #include "qemu/osdep.h" |
| 31 | #include "qemu/module.h" |
| 32 | #include "qemu/units.h" |
| 33 | #include "hw/core/hw-error.h" |
| 34 | #include "hw/core/sysbus.h" |
| 35 | #include "system/hw_accel.h" |
| 36 | #include "hw/ppc/ppc.h" |
| 37 | #include "e500.h" |
| 38 | #include "qom/object.h" |
| 39 | |
| 40 | #define MAX_CPUS 32 |
| 41 | |
| 42 | typedef struct spin_info { |
| 43 | uint64_t addr; |
| 44 | uint64_t r3; |
| 45 | uint32_t resv; |
| 46 | uint32_t pir; |
| 47 | uint64_t reserved; |
| 48 | } QEMU_PACKED SpinInfo; |
| 49 | |
| 50 | #define TYPE_E500_SPIN "e500-spin" |
| 51 | OBJECT_DECLARE_SIMPLE_TYPE(SpinState, E500_SPIN) |
| 52 | |
| 53 | struct SpinState { |
| 54 | SysBusDevice parent_obj; |
| 55 | |
| 56 | MemoryRegion iomem; |
| 57 | SpinInfo spin[MAX_CPUS]; |
| 58 | }; |
| 59 | |
| 60 | static void spin_reset(DeviceState *dev) |
| 61 | { |
| 62 | SpinState *s = E500_SPIN(dev); |
| 63 | int i; |
| 64 | |
| 65 | for (i = 0; i < MAX_CPUS; i++) { |
| 66 | SpinInfo *info = &s->spin[i]; |
| 67 | |
| 68 | stl_p(&info->pir, i); |
| 69 | stq_p(&info->r3, i); |
| 70 | stq_p(&info->addr, 1); |
| 71 | } |
| 72 | } |
| 73 | |
| 74 | static void spin_kick(CPUState *cs, run_on_cpu_data data) |
| 75 | { |
| 76 | CPUPPCState *env = cpu_env(cs); |
| 77 | SpinInfo *curspin = data.host_ptr; |
| 78 | hwaddr map_start, map_size = 64 * MiB; |
| 79 | ppcmas_tlb_t *tlb = booke206_get_tlbm(env, 1, 0, 1); |
| 80 | |
| 81 | cpu_synchronize_state(cs); |
| 82 | stl_p(&curspin->pir, env->spr[SPR_BOOKE_PIR]); |
| 83 | env->nip = ldq_p(&curspin->addr) & (map_size - 1); |
| 84 | env->gpr[3] = ldq_p(&curspin->r3); |
| 85 | env->gpr[4] = 0; |
| 86 | env->gpr[5] = 0; |
| 87 | env->gpr[6] = 0; |
| 88 | env->gpr[7] = map_size; |
| 89 | env->gpr[8] = 0; |
| 90 | env->gpr[9] = 0; |
| 91 | |
| 92 | map_start = ldq_p(&curspin->addr) & ~(map_size - 1); |
| 93 | /* create initial mapping */ |
| 94 | booke206_set_tlb(tlb, 0, map_start, map_size); |
| 95 | tlb->mas2 |= MAS2_M; |
| 96 | #ifdef CONFIG_KVM |
| 97 | env->tlb_dirty = true; |
| 98 | #endif |
| 99 | |
| 100 | cs->halted = 0; |
| 101 | cs->exception_index = -1; |
| 102 | cpu_resume(cs); |
| 103 | } |
| 104 | |
| 105 | static void spin_write(void *opaque, hwaddr addr, uint64_t value, |
| 106 | unsigned len) |
| 107 | { |
| 108 | SpinState *s = opaque; |
| 109 | int env_idx = addr / sizeof(SpinInfo); |
| 110 | CPUState *cpu; |
| 111 | SpinInfo *curspin = &s->spin[env_idx]; |
| 112 | uint8_t *curspin_p = (uint8_t*)curspin; |
| 113 | |
| 114 | cpu = qemu_get_cpu(env_idx); |
| 115 | if (cpu == NULL) { |
| 116 | /* Unknown CPU */ |
| 117 | return; |
| 118 | } |
| 119 | |
| 120 | if (cpu->cpu_index == 0) { |
| 121 | /* primary CPU doesn't spin */ |
| 122 | return; |
| 123 | } |
| 124 | |
| 125 | curspin_p = &curspin_p[addr % sizeof(SpinInfo)]; |
| 126 | switch (len) { |
| 127 | case 1: |
| 128 | stb_p(curspin_p, value); |
| 129 | break; |
| 130 | case 2: |
| 131 | stw_p(curspin_p, value); |
| 132 | break; |
| 133 | case 4: |
| 134 | stl_p(curspin_p, value); |
| 135 | break; |
| 136 | } |
| 137 | |
| 138 | if (!(ldq_p(&curspin->addr) & 1)) { |
| 139 | /* run CPU */ |
| 140 | run_on_cpu(cpu, spin_kick, RUN_ON_CPU_HOST_PTR(curspin)); |
| 141 | } |
| 142 | } |
| 143 | |
| 144 | static uint64_t spin_read(void *opaque, hwaddr addr, unsigned len) |
| 145 | { |
| 146 | SpinState *s = opaque; |
| 147 | uint8_t *spin_p = &((uint8_t*)s->spin)[addr]; |
| 148 | |
| 149 | switch (len) { |
| 150 | case 1: |
| 151 | return ldub_p(spin_p); |
| 152 | case 2: |
| 153 | return lduw_p(spin_p); |
| 154 | case 4: |
| 155 | return ldl_p(spin_p); |
| 156 | default: |
| 157 | hw_error("ppce500: unexpected %s with len = %u", __func__, len); |
| 158 | } |
| 159 | } |
| 160 | |
| 161 | static const MemoryRegionOps spin_rw_ops = { |
| 162 | .read = spin_read, |
| 163 | .write = spin_write, |
| 164 | .endianness = DEVICE_BIG_ENDIAN, |
| 165 | }; |
| 166 | |
| 167 | static void ppce500_spin_initfn(Object *obj) |
| 168 | { |
| 169 | SysBusDevice *dev = SYS_BUS_DEVICE(obj); |
| 170 | SpinState *s = E500_SPIN(dev); |
| 171 | |
| 172 | memory_region_init_io(&s->iomem, obj, &spin_rw_ops, s, |
| 173 | "e500 spin pv device", sizeof(SpinInfo) * MAX_CPUS); |
| 174 | sysbus_init_mmio(dev, &s->iomem); |
| 175 | } |
| 176 | |
| 177 | static void ppce500_spin_class_init(ObjectClass *klass, const void *data) |
| 178 | { |
| 179 | DeviceClass *dc = DEVICE_CLASS(klass); |
| 180 | |
| 181 | device_class_set_legacy_reset(dc, spin_reset); |
| 182 | } |
| 183 | |
| 184 | static const TypeInfo ppce500_spin_info = { |
| 185 | .name = TYPE_E500_SPIN, |
| 186 | .parent = TYPE_SYS_BUS_DEVICE, |
| 187 | .instance_size = sizeof(SpinState), |
| 188 | .instance_init = ppce500_spin_initfn, |
| 189 | .class_init = ppce500_spin_class_init, |
| 190 | }; |
| 191 | |
| 192 | static void ppce500_spin_register_types(void) |
| 193 | { |
| 194 | type_register_static(&ppce500_spin_info); |
| 195 | } |
| 196 | |
| 197 | type_init(ppce500_spin_register_types) |