| 1 | /* |
| 2 | * Firmware Assisted Dump in PSeries |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 5 | */ |
| 6 | |
| 7 | #include "qemu/osdep.h" |
| 8 | #include "qemu/log.h" |
| 9 | #include "hw/ppc/spapr.h" |
| 10 | #include "qemu/units.h" |
| 11 | #include "system/cpus.h" |
| 12 | #include "system/hw_accel.h" |
| 13 | #include <math.h> |
| 14 | |
| 15 | /* |
| 16 | * Copy the ascii values for first 8 characters from a string into u64 |
| 17 | * variable at their respective indexes. |
| 18 | * e.g. |
| 19 | * The string "FADMPINF" will be converted into 0x4641444d50494e46 |
| 20 | */ |
| 21 | static uint64_t fadump_str_to_u64(const char *str) |
| 22 | { |
| 23 | uint64_t val = 0; |
| 24 | int i; |
| 25 | |
| 26 | for (i = 0; i < sizeof(val); i++) { |
| 27 | val = (*str) ? (val << 8) | *str++ : val << 8; |
| 28 | } |
| 29 | return val; |
| 30 | } |
| 31 | |
| 32 | /** |
| 33 | * Get the identifier id for register entries of GPRs |
| 34 | * |
| 35 | * It gives the same id as 'fadump_str_to_u64' when the complete string id |
| 36 | * of the GPR is given, ie. |
| 37 | * |
| 38 | * fadump_str_to_u64("GPR05") == fadump_gpr_id_to_u64(5); |
| 39 | * fadump_str_to_u64("GPR12") == fadump_gpr_id_to_u64(12); |
| 40 | * |
| 41 | * And so on. Hence this can be implemented by creating a dynamic |
| 42 | * string for each GPR, such as "GPR00", "GPR01", ... "GPR31" |
| 43 | * Instead of allocating a string, an observation from the math of |
| 44 | * 'fadump_str_to_u64' or from PAPR tells us that there's a pattern |
| 45 | * in the identifier IDs, such that the first 4 bytes are affected only by |
| 46 | * whether it is GPR0*, GPR1*, GPR2*, GPR3*. |
| 47 | * Upper half of 5th byte is always 0x3. Lower half (nibble) of 5th byte |
| 48 | * is the tens digit of the GPR id, ie. GPR ID / 10. |
| 49 | * Upper half of 6th byte is always 0x3. Lower half (nibble) of 5th byte |
| 50 | * is the ones digit of the GPR id, ie. GPR ID % 10 |
| 51 | * |
| 52 | * For example, for GPR 29, the 5th and 6th byte will be 0x32 and 0x39 |
| 53 | */ |
| 54 | static uint64_t fadump_gpr_id_to_u64(uint32_t gpr_id) |
| 55 | { |
| 56 | uint64_t val = 0; |
| 57 | |
| 58 | /* Valid range of GPR id is only GPR0 to GPR31 */ |
| 59 | assert(gpr_id < 32); |
| 60 | |
| 61 | /* Below calculations set the 0th to 5th byte */ |
| 62 | if (gpr_id <= 9) { |
| 63 | val = fadump_str_to_u64("GPR0"); |
| 64 | } else if (gpr_id <= 19) { |
| 65 | val = fadump_str_to_u64("GPR1"); |
| 66 | } else if (gpr_id <= 29) { |
| 67 | val = fadump_str_to_u64("GPR2"); |
| 68 | } else { |
| 69 | val = fadump_str_to_u64("GPR3"); |
| 70 | } |
| 71 | |
| 72 | /* Set the 6th byte */ |
| 73 | val |= 0x30000000; |
| 74 | val |= ((gpr_id % 10) << 24); |
| 75 | |
| 76 | return val; |
| 77 | } |
| 78 | |
| 79 | /* |
| 80 | * Handle the "FADUMP_CMD_REGISTER" command in 'ibm,configure-kernel-dump' |
| 81 | * |
| 82 | * Note: Any changes made by the kernel to the fadump memory struct won't |
| 83 | * reflect in QEMU after the 'ibm,configure-kernel-dump' RTAS call has returned, |
| 84 | * as we store the passed fadump memory structure passed during fadump |
| 85 | * registration. |
| 86 | * Kernel has to invalidate & re-register fadump, if it intends to make any |
| 87 | * changes to the fadump memory structure |
| 88 | * |
| 89 | * Returns: |
| 90 | * * RTAS_OUT_SUCCESS: On successful registration |
| 91 | * * RTAS_OUT_PARAM_ERROR: If parameters are not correct, eg. too many |
| 92 | * sections, invalid memory addresses that we are |
| 93 | * unable to read, etc |
| 94 | * * RTAS_OUT_DUMP_ALREADY_REGISTERED: Dump already registered |
| 95 | * * RTAS_OUT_HW_ERROR: Misc issue such as memory access failures |
| 96 | */ |
| 97 | uint32_t do_fadump_register(SpaprMachineState *spapr, target_ulong args) |
| 98 | { |
| 99 | FadumpSectionHeader header; |
| 100 | FadumpSection regions[FADUMP_MAX_SECTIONS] = {0}; |
| 101 | target_ulong fdm_addr = rtas_ld(args, 1); |
| 102 | target_ulong fdm_size = rtas_ld(args, 2); |
| 103 | AddressSpace *default_as = &address_space_memory; |
| 104 | MemTxResult io_result; |
| 105 | MemTxAttrs attrs; |
| 106 | uint64_t next_section_addr; |
| 107 | uint16_t dump_num_sections; |
| 108 | |
| 109 | /* Mark the memory transaction as privileged memory access */ |
| 110 | attrs.user = 0; |
| 111 | attrs.memory = 1; |
| 112 | |
| 113 | if (spapr->fadump_registered) { |
| 114 | /* FADump already registered */ |
| 115 | return RTAS_OUT_DUMP_ALREADY_REGISTERED; |
| 116 | } |
| 117 | |
| 118 | if (spapr->fadump_dump_active) { |
| 119 | return RTAS_OUT_DUMP_ACTIVE; |
| 120 | } |
| 121 | |
| 122 | if (fdm_size < sizeof(FadumpSectionHeader)) { |
| 123 | qemu_log_mask(LOG_GUEST_ERROR, |
| 124 | "FADump: Header size is invalid: " TARGET_FMT_lu "\n", fdm_size); |
| 125 | return RTAS_OUT_PARAM_ERROR; |
| 126 | } |
| 127 | |
| 128 | /* Ensure fdm_addr points to a valid RMR-memory/RMA-memory buffer */ |
| 129 | if ((fdm_addr <= 0) || ((fdm_addr + fdm_size) > spapr->rma_size)) { |
| 130 | qemu_log_mask(LOG_GUEST_ERROR, |
| 131 | "FADump: Invalid fdm address: " TARGET_FMT_lu "\n", fdm_addr); |
| 132 | return RTAS_OUT_PARAM_ERROR; |
| 133 | } |
| 134 | |
| 135 | /* Try to read the passed fadump header */ |
| 136 | io_result = address_space_read(default_as, fdm_addr, attrs, |
| 137 | &header, sizeof(header)); |
| 138 | if (io_result != MEMTX_OK) { |
| 139 | qemu_log_mask(LOG_GUEST_ERROR, |
| 140 | "FADump: Unable to read fdm: " TARGET_FMT_lu "\n", fdm_addr); |
| 141 | |
| 142 | return RTAS_OUT_HW_ERROR; |
| 143 | } |
| 144 | |
| 145 | /* Verify that we understand the fadump header version */ |
| 146 | if (header.dump_format_version != cpu_to_be32(FADUMP_VERSION)) { |
| 147 | qemu_log_mask(LOG_GUEST_ERROR, |
| 148 | "FADump: Unknown fadump header version: 0x%x\n", |
| 149 | header.dump_format_version); |
| 150 | return RTAS_OUT_PARAM_ERROR; |
| 151 | } |
| 152 | |
| 153 | /* Reset dump status flags */ |
| 154 | header.dump_status_flag = 0; |
| 155 | |
| 156 | dump_num_sections = be16_to_cpu(header.dump_num_sections); |
| 157 | |
| 158 | if (dump_num_sections > FADUMP_MAX_SECTIONS) { |
| 159 | qemu_log_mask(LOG_GUEST_ERROR, |
| 160 | "FADump: Too many sections: %d sections\n", dump_num_sections); |
| 161 | return RTAS_OUT_PARAM_ERROR; |
| 162 | } |
| 163 | |
| 164 | next_section_addr = |
| 165 | fdm_addr + |
| 166 | be32_to_cpu(header.offset_first_dump_section); |
| 167 | |
| 168 | for (int i = 0; i < dump_num_sections; ++i) { |
| 169 | /* Read the fadump section from memory */ |
| 170 | io_result = address_space_read(default_as, next_section_addr, attrs, |
| 171 | ®ions[i], sizeof(regions[i])); |
| 172 | if (io_result != MEMTX_OK) { |
| 173 | qemu_log_mask(LOG_UNIMP, |
| 174 | "FADump: Unable to read fadump %dth section\n", i); |
| 175 | return RTAS_OUT_PARAM_ERROR; |
| 176 | } |
| 177 | |
| 178 | next_section_addr += sizeof(regions[i]); |
| 179 | } |
| 180 | |
| 181 | spapr->fadump_registered = true; |
| 182 | spapr->fadump_dump_active = false; |
| 183 | |
| 184 | /* Store the registered fadump memory struct */ |
| 185 | spapr->registered_fdm.header = header; |
| 186 | for (int i = 0; i < dump_num_sections; ++i) { |
| 187 | spapr->registered_fdm.rgn[i] = regions[i]; |
| 188 | } |
| 189 | |
| 190 | return RTAS_OUT_SUCCESS; |
| 191 | } |
| 192 | |
| 193 | /* |
| 194 | * Copy the source region of given fadump section, to the destination |
| 195 | * address mentioned in the region |
| 196 | * |
| 197 | * Also set the region's error flag, if the copy fails due to non-existent |
| 198 | * address (MEMTX_DECODE_ERROR) or permission issues (MEMTX_ACCESS_ERROR) |
| 199 | * |
| 200 | * Returns true if successful copy |
| 201 | * |
| 202 | * Returns false in case of any other error, being treated as hardware |
| 203 | * error for fadump purposes |
| 204 | */ |
| 205 | static bool do_preserve_region(FadumpSection *region) |
| 206 | { |
| 207 | AddressSpace *default_as = &address_space_memory; |
| 208 | MemTxResult io_result; |
| 209 | MemTxAttrs attrs; |
| 210 | uint64_t src_addr, src_len, dest_addr; |
| 211 | uint64_t num_chunks; |
| 212 | g_autofree void *copy_buffer = NULL; |
| 213 | |
| 214 | src_addr = be64_to_cpu(region->source_address); |
| 215 | src_len = be64_to_cpu(region->source_len); |
| 216 | dest_addr = be64_to_cpu(region->destination_address); |
| 217 | |
| 218 | /* Mark the memory transaction as privileged memory access */ |
| 219 | attrs.user = 0; |
| 220 | attrs.memory = 1; |
| 221 | |
| 222 | /* |
| 223 | * Optimisation: Skip copy if source and destination are same |
| 224 | * (eg. param area) |
| 225 | */ |
| 226 | if (src_addr == dest_addr) { |
| 227 | region->bytes_dumped = cpu_to_be64(src_len); |
| 228 | return true; |
| 229 | } |
| 230 | |
| 231 | #define FADUMP_CHUNK_SIZE ((size_t)(32 * MiB)) |
| 232 | copy_buffer = g_try_malloc(FADUMP_CHUNK_SIZE); |
| 233 | if (copy_buffer == NULL) { |
| 234 | qemu_log_mask(LOG_GUEST_ERROR, |
| 235 | "FADump: Failed allocating memory (size: %zu) for copying" |
| 236 | " reserved memory regions\n", FADUMP_CHUNK_SIZE); |
| 237 | return false; |
| 238 | } |
| 239 | |
| 240 | num_chunks = ceil((src_len * 1.0f) / FADUMP_CHUNK_SIZE); |
| 241 | for (uint64_t chunk_id = 0; chunk_id < num_chunks; ++chunk_id) { |
| 242 | /* Take minimum of bytes left to copy, and chunk size */ |
| 243 | uint64_t copy_len = MIN( |
| 244 | src_len - (chunk_id * FADUMP_CHUNK_SIZE), |
| 245 | FADUMP_CHUNK_SIZE |
| 246 | ); |
| 247 | |
| 248 | /* Copy the source region to destination */ |
| 249 | io_result = address_space_read(default_as, src_addr, attrs, |
| 250 | copy_buffer, copy_len); |
| 251 | if ((io_result & MEMTX_DECODE_ERROR) || |
| 252 | (io_result & MEMTX_ACCESS_ERROR)) { |
| 253 | qemu_log_mask(LOG_GUEST_ERROR, |
| 254 | "FADump: Failed to decode/access address in section: %d\n", |
| 255 | region->source_data_type); |
| 256 | |
| 257 | /* |
| 258 | * Invalid source address is not an hardware error, instead |
| 259 | * wrong parameter from the kernel. |
| 260 | * Return true to let caller know to continue reading other |
| 261 | * sections |
| 262 | */ |
| 263 | region->error_flags = FADUMP_ERROR_INVALID_SOURCE_ADDR; |
| 264 | region->bytes_dumped = 0; |
| 265 | return true; |
| 266 | } else if (io_result != MEMTX_OK) { |
| 267 | qemu_log_mask(LOG_GUEST_ERROR, |
| 268 | "FADump: Failed to read source region in section: %d\n", |
| 269 | region->source_data_type); |
| 270 | |
| 271 | return false; |
| 272 | } |
| 273 | |
| 274 | io_result = address_space_write(default_as, dest_addr, attrs, |
| 275 | copy_buffer, copy_len); |
| 276 | if ((io_result & MEMTX_DECODE_ERROR) || |
| 277 | (io_result & MEMTX_ACCESS_ERROR)) { |
| 278 | qemu_log_mask(LOG_GUEST_ERROR, |
| 279 | "FADump: Failed to decode/access address in section: %d\n", |
| 280 | region->source_data_type); |
| 281 | |
| 282 | /* |
| 283 | * Invalid destination address is not an hardware error, |
| 284 | * instead wrong parameter from the kernel. |
| 285 | * Return true to let caller know to continue reading other |
| 286 | * sections |
| 287 | */ |
| 288 | region->error_flags = FADUMP_ERROR_INVALID_DEST_ADDR; |
| 289 | region->bytes_dumped = 0; |
| 290 | return true; |
| 291 | } else if (io_result != MEMTX_OK) { |
| 292 | qemu_log_mask(LOG_GUEST_ERROR, |
| 293 | "FADump: Failed to write destination in section: %d\n", |
| 294 | region->source_data_type); |
| 295 | |
| 296 | return false; |
| 297 | } |
| 298 | |
| 299 | src_addr += FADUMP_CHUNK_SIZE; |
| 300 | dest_addr += FADUMP_CHUNK_SIZE; |
| 301 | } |
| 302 | #undef FADUMP_CHUNK_SIZE |
| 303 | |
| 304 | /* |
| 305 | * Considering address_space_write would have copied the |
| 306 | * complete region |
| 307 | */ |
| 308 | region->bytes_dumped = cpu_to_be64(src_len); |
| 309 | return true; |
| 310 | } |
| 311 | |
| 312 | /* |
| 313 | * Populate the passed CPUs register entries, in the buffer starting at |
| 314 | * the argument 'curr_reg_entry' |
| 315 | * |
| 316 | * The register entries is an array of pair of register id and register |
| 317 | * value, as described in Table 591/592 in section "H.1 Register Save Area" |
| 318 | * in PAPR v2.13 |
| 319 | * |
| 320 | * Returns pointer just past this CPU's register entries, which can be used |
| 321 | * as the start address for next CPU's register entries |
| 322 | */ |
| 323 | static FadumpRegEntry *populate_cpu_reg_entries(CPUState *cpu, |
| 324 | FadumpRegEntry *curr_reg_entry) |
| 325 | { |
| 326 | CPUPPCState *env; |
| 327 | PowerPCCPU *ppc_cpu; |
| 328 | uint32_t num_regs_per_cpu = 0; |
| 329 | |
| 330 | ppc_cpu = POWERPC_CPU(cpu); |
| 331 | env = cpu_env(cpu); |
| 332 | num_regs_per_cpu = 0; |
| 333 | |
| 334 | /* |
| 335 | * CPUSTRT and CPUEND register entries follow this format: |
| 336 | * |
| 337 | * 8 Bytes Reg ID (BE) | 4 Bytes (0x0) | 4 Bytes Logical CPU ID (BE) |
| 338 | */ |
| 339 | curr_reg_entry->reg_id = |
| 340 | cpu_to_be64(fadump_str_to_u64("CPUSTRT")); |
| 341 | curr_reg_entry->reg_value = cpu_to_be64( |
| 342 | ppc_cpu->vcpu_id & FADUMP_CPU_ID_MASK); |
| 343 | ++curr_reg_entry; |
| 344 | |
| 345 | #define REG_ENTRY(id, val) \ |
| 346 | do { \ |
| 347 | curr_reg_entry->reg_id = \ |
| 348 | cpu_to_be64(fadump_str_to_u64(#id)); \ |
| 349 | curr_reg_entry->reg_value = cpu_to_be64(val); \ |
| 350 | ++curr_reg_entry; \ |
| 351 | ++num_regs_per_cpu; \ |
| 352 | } while (0) |
| 353 | |
| 354 | REG_ENTRY(ACOP, env->spr[SPR_ACOP]); |
| 355 | REG_ENTRY(AMR, env->spr[SPR_AMR]); |
| 356 | REG_ENTRY(BESCR, env->spr[SPR_BESCR]); |
| 357 | REG_ENTRY(CFAR, env->spr[SPR_CFAR]); |
| 358 | REG_ENTRY(CIABR, env->spr[SPR_CIABR]); |
| 359 | |
| 360 | /* Save the condition register */ |
| 361 | REG_ENTRY(CR, ppc_get_cr(env)); |
| 362 | |
| 363 | REG_ENTRY(CTR, env->spr[SPR_CTR]); |
| 364 | REG_ENTRY(CTRL, env->spr[SPR_CTRL]); |
| 365 | REG_ENTRY(DABR, env->spr[SPR_DABR]); |
| 366 | REG_ENTRY(DABRX, env->spr[SPR_DABRX]); |
| 367 | REG_ENTRY(DAR, env->spr[SPR_DAR]); |
| 368 | REG_ENTRY(DAWR0, env->spr[SPR_DAWR0]); |
| 369 | REG_ENTRY(DAWR1, env->spr[SPR_DAWR1]); |
| 370 | REG_ENTRY(DAWRX0, env->spr[SPR_DAWRX0]); |
| 371 | REG_ENTRY(DAWRX1, env->spr[SPR_DAWRX1]); |
| 372 | REG_ENTRY(DPDES, env->spr[SPR_DPDES]); |
| 373 | REG_ENTRY(DSCR, env->spr[SPR_DSCR]); |
| 374 | REG_ENTRY(DSISR, env->spr[SPR_DSISR]); |
| 375 | REG_ENTRY(EBBHR, env->spr[SPR_EBBHR]); |
| 376 | REG_ENTRY(EBBRR, env->spr[SPR_EBBRR]); |
| 377 | |
| 378 | REG_ENTRY(FPSCR, env->fpscr); |
| 379 | REG_ENTRY(FSCR, env->spr[SPR_FSCR]); |
| 380 | |
| 381 | /* Save the GPRs */ |
| 382 | for (int gpr_id = 0; gpr_id < 32; ++gpr_id) { |
| 383 | curr_reg_entry->reg_id = |
| 384 | cpu_to_be64(fadump_gpr_id_to_u64(gpr_id)); |
| 385 | curr_reg_entry->reg_value = |
| 386 | cpu_to_be64(env->gpr[gpr_id]); |
| 387 | ++curr_reg_entry; |
| 388 | ++num_regs_per_cpu; |
| 389 | } |
| 390 | |
| 391 | REG_ENTRY(IAMR, env->spr[SPR_IAMR]); |
| 392 | REG_ENTRY(IC, env->spr[SPR_IC]); |
| 393 | REG_ENTRY(LR, env->spr[SPR_LR]); |
| 394 | |
| 395 | REG_ENTRY(MSR, env->msr); |
| 396 | REG_ENTRY(NIA, env->nip); /* NIA */ |
| 397 | REG_ENTRY(PIR, env->spr[SPR_PIR]); |
| 398 | REG_ENTRY(PSPB, env->spr[SPR_PSPB]); |
| 399 | REG_ENTRY(PVR, env->spr[SPR_PVR]); |
| 400 | REG_ENTRY(RPR, env->spr[SPR_RPR]); |
| 401 | REG_ENTRY(SPURR, env->spr[SPR_SPURR]); |
| 402 | REG_ENTRY(SRR0, env->spr[SPR_SRR0]); |
| 403 | REG_ENTRY(SRR1, env->spr[SPR_SRR1]); |
| 404 | REG_ENTRY(TAR, env->spr[SPR_TAR]); |
| 405 | REG_ENTRY(TEXASR, env->spr[SPR_TEXASR]); |
| 406 | REG_ENTRY(TFHAR, env->spr[SPR_TFHAR]); |
| 407 | REG_ENTRY(TFIAR, env->spr[SPR_TFIAR]); |
| 408 | REG_ENTRY(TIR, env->spr[SPR_TIR]); |
| 409 | REG_ENTRY(UAMOR, env->spr[SPR_UAMOR]); |
| 410 | REG_ENTRY(VRSAVE, env->spr[SPR_VRSAVE]); |
| 411 | REG_ENTRY(VSCR, env->vscr); |
| 412 | REG_ENTRY(VTB, env->spr[SPR_VTB]); |
| 413 | REG_ENTRY(WORT, env->spr[SPR_WORT]); |
| 414 | REG_ENTRY(XER, env->spr[SPR_XER]); |
| 415 | |
| 416 | /* |
| 417 | * Ignoring transaction checkpoint and few other registers |
| 418 | * mentioned in PAPR as not supported in QEMU |
| 419 | */ |
| 420 | #undef REG_ENTRY |
| 421 | |
| 422 | /* End the registers for this CPU with "CPUEND" reg entry */ |
| 423 | curr_reg_entry->reg_id = |
| 424 | cpu_to_be64(fadump_str_to_u64("CPUEND")); |
| 425 | curr_reg_entry->reg_value = cpu_to_be64( |
| 426 | ppc_cpu->vcpu_id & FADUMP_CPU_ID_MASK); |
| 427 | |
| 428 | /* |
| 429 | * Ensure number of register entries saved matches the expected |
| 430 | * 'FADUMP_PER_CPU_REG_ENTRIES' count |
| 431 | * |
| 432 | * This will help catch an error if in future a new register entry |
| 433 | * is added/removed while not modifying FADUMP_PER_CPU_REG_ENTRIES |
| 434 | */ |
| 435 | assert(FADUMP_PER_CPU_REG_ENTRIES == num_regs_per_cpu + 2 /*CPUSTRT+CPUEND*/); |
| 436 | |
| 437 | ++curr_reg_entry; |
| 438 | |
| 439 | return curr_reg_entry; |
| 440 | } |
| 441 | |
| 442 | /* |
| 443 | * Populate the "Register Save Area"/CPU State as mentioned in section "H.1 |
| 444 | * Register Save Area" in PAPR v2.13 |
| 445 | * |
| 446 | * It allocates the buffer for this region, then populates the register |
| 447 | * entries |
| 448 | * |
| 449 | * Returns the pointer to the buffer (which should be deallocated by the |
| 450 | * callers), and sets the size of this buffer in the argument |
| 451 | * 'cpu_state_len' |
| 452 | */ |
| 453 | static void *get_cpu_state_data(uint64_t *cpu_state_len) |
| 454 | { |
| 455 | FadumpRegSaveAreaHeader reg_save_hdr; |
| 456 | g_autofree FadumpRegEntry *reg_entries = NULL; |
| 457 | FadumpRegEntry *curr_reg_entry; |
| 458 | CPUState *cpu; |
| 459 | |
| 460 | uint32_t num_reg_entries; |
| 461 | uint32_t reg_entries_size; |
| 462 | uint32_t num_cpus = 0; |
| 463 | |
| 464 | void *cpu_state_buffer = NULL; |
| 465 | uint64_t offset = 0; |
| 466 | |
| 467 | CPU_FOREACH(cpu) { |
| 468 | ++num_cpus; |
| 469 | } |
| 470 | |
| 471 | reg_save_hdr.version = cpu_to_be32(0); |
| 472 | reg_save_hdr.magic_number = |
| 473 | cpu_to_be64(fadump_str_to_u64("REGSAVE")); |
| 474 | |
| 475 | /* Reg save area header is immediately followed by num cpus */ |
| 476 | reg_save_hdr.num_cpu_offset = |
| 477 | cpu_to_be32(sizeof(FadumpRegSaveAreaHeader)); |
| 478 | |
| 479 | num_reg_entries = num_cpus * FADUMP_PER_CPU_REG_ENTRIES; |
| 480 | reg_entries_size = num_reg_entries * sizeof(FadumpRegEntry); |
| 481 | |
| 482 | reg_entries = g_new(FadumpRegEntry, num_reg_entries); |
| 483 | |
| 484 | /* Pointer to current CPU's registers */ |
| 485 | curr_reg_entry = reg_entries; |
| 486 | |
| 487 | /* Populate register entries for all CPUs */ |
| 488 | CPU_FOREACH(cpu) { |
| 489 | cpu_synchronize_state(cpu); |
| 490 | curr_reg_entry = populate_cpu_reg_entries(cpu, curr_reg_entry); |
| 491 | } |
| 492 | |
| 493 | *cpu_state_len = 0; |
| 494 | *cpu_state_len += sizeof(reg_save_hdr); /* reg save header */ |
| 495 | *cpu_state_len += 0xc; /* padding as in PAPR */ |
| 496 | *cpu_state_len += sizeof(num_cpus); /* num_cpus */ |
| 497 | *cpu_state_len += reg_entries_size; /* reg entries */ |
| 498 | |
| 499 | cpu_state_buffer = g_malloc(*cpu_state_len); |
| 500 | |
| 501 | memcpy(cpu_state_buffer + offset, |
| 502 | ®_save_hdr, sizeof(reg_save_hdr)); |
| 503 | offset += sizeof(reg_save_hdr); |
| 504 | |
| 505 | /* Write num_cpus */ |
| 506 | num_cpus = cpu_to_be32(num_cpus); |
| 507 | memcpy(cpu_state_buffer + offset, &num_cpus, sizeof(num_cpus)); |
| 508 | offset += sizeof(num_cpus); |
| 509 | |
| 510 | /* Write the register entries */ |
| 511 | memcpy(cpu_state_buffer + offset, reg_entries, reg_entries_size); |
| 512 | offset += reg_entries_size; |
| 513 | |
| 514 | return cpu_state_buffer; |
| 515 | } |
| 516 | |
| 517 | /* |
| 518 | * Save the CPU State Data (aka "Register Save Area") in given region |
| 519 | * |
| 520 | * Region argument is expected to be of CPU_STATE_DATA type |
| 521 | * |
| 522 | * Returns false only in case of Hardware Error, such as failure to |
| 523 | * read/write a valid address. |
| 524 | * |
| 525 | * Otherwise, even in case of unsuccessful copy of CPU state data for reasons |
| 526 | * such as invalid destination address or non-fatal error errors likely |
| 527 | * caused due to invalid parameters, return true and set region->error_flags |
| 528 | */ |
| 529 | static bool do_populate_cpu_state(FadumpSection *region) |
| 530 | { |
| 531 | uint64_t dest_addr = be64_to_cpu(region->destination_address); |
| 532 | uint64_t cpu_state_len = 0; |
| 533 | g_autofree void *cpu_state_buffer = NULL; |
| 534 | AddressSpace *default_as = &address_space_memory; |
| 535 | MemTxResult io_result; |
| 536 | MemTxAttrs attrs; |
| 537 | |
| 538 | assert(region->source_data_type == cpu_to_be16(FADUMP_CPU_STATE_DATA)); |
| 539 | |
| 540 | /* Mark the memory transaction as privileged memory access */ |
| 541 | attrs.user = 0; |
| 542 | attrs.memory = 1; |
| 543 | |
| 544 | cpu_state_buffer = get_cpu_state_data(&cpu_state_len); |
| 545 | |
| 546 | io_result = address_space_write(default_as, dest_addr, attrs, |
| 547 | cpu_state_buffer, cpu_state_len); |
| 548 | if ((io_result & MEMTX_DECODE_ERROR) || |
| 549 | (io_result & MEMTX_ACCESS_ERROR)) { |
| 550 | qemu_log_mask(LOG_GUEST_ERROR, |
| 551 | "FADump: Failed to decode/access address in CPU State Region's" |
| 552 | " destination address: 0x%016" PRIx64 "\n", dest_addr); |
| 553 | |
| 554 | /* |
| 555 | * Invalid source address is not an hardware error, instead |
| 556 | * wrong parameter from the kernel. |
| 557 | * Return true to let caller know to continue reading other |
| 558 | * sections |
| 559 | */ |
| 560 | region->error_flags = FADUMP_ERROR_INVALID_SOURCE_ADDR; |
| 561 | region->bytes_dumped = 0; |
| 562 | return true; |
| 563 | } else if (io_result != MEMTX_OK) { |
| 564 | qemu_log_mask(LOG_GUEST_ERROR, |
| 565 | "FADump: Failed to write CPU state region.\n"); |
| 566 | |
| 567 | return false; |
| 568 | } |
| 569 | |
| 570 | /* |
| 571 | * Set bytes_dumped in cpu state region, so kernel knows platform have |
| 572 | * exported it |
| 573 | */ |
| 574 | region->bytes_dumped = cpu_to_be64(cpu_state_len); |
| 575 | |
| 576 | if (region->source_len != region->bytes_dumped) { |
| 577 | /* |
| 578 | * Log the error, but don't fail the dump collection here, let |
| 579 | * kernel handle the mismatch |
| 580 | */ |
| 581 | qemu_log_mask(LOG_GUEST_ERROR, |
| 582 | "FADump: Mismatch in CPU State region's length exported:" |
| 583 | " Kernel expected: 0x%" PRIx64 " bytes," |
| 584 | " QEMU exported: 0x%" PRIx64 " bytes\n", |
| 585 | be64_to_cpu(region->source_len), |
| 586 | be64_to_cpu(region->bytes_dumped)); |
| 587 | } |
| 588 | |
| 589 | return true; |
| 590 | } |
| 591 | |
| 592 | /* |
| 593 | * Preserve the memory locations registered for fadump |
| 594 | * |
| 595 | * Returns false only in case of RTAS_OUT_HW_ERROR, otherwise true |
| 596 | */ |
| 597 | static bool fadump_preserve_mem(SpaprMachineState *spapr) |
| 598 | { |
| 599 | FadumpMemStruct *fdm = &spapr->registered_fdm; |
| 600 | uint16_t dump_num_sections, data_type; |
| 601 | |
| 602 | assert(spapr->fadump_registered); |
| 603 | |
| 604 | /* |
| 605 | * Handle all sections |
| 606 | * |
| 607 | * CPU State Data and HPTE regions are handled in their own cases |
| 608 | * |
| 609 | * RMR regions and any custom OS reserved regions such as parameter |
| 610 | * save area, are handled by simply copying the source region to |
| 611 | * destination address |
| 612 | */ |
| 613 | dump_num_sections = be16_to_cpu(fdm->header.dump_num_sections); |
| 614 | for (int i = 0; i < dump_num_sections; ++i) { |
| 615 | data_type = be16_to_cpu(fdm->rgn[i].source_data_type); |
| 616 | |
| 617 | /* Reset error_flags & bytes_dumped for now */ |
| 618 | fdm->rgn[i].error_flags = 0; |
| 619 | fdm->rgn[i].bytes_dumped = 0; |
| 620 | |
| 621 | /* If kernel did not request for the memory region, then skip it */ |
| 622 | if (be32_to_cpu(fdm->rgn[i].request_flag) != FADUMP_REQUEST_FLAG) { |
| 623 | qemu_log_mask(LOG_UNIMP, |
| 624 | "FADump: Skipping copying region as not requested\n"); |
| 625 | continue; |
| 626 | } |
| 627 | |
| 628 | switch (data_type) { |
| 629 | case FADUMP_CPU_STATE_DATA: |
| 630 | if (!do_populate_cpu_state(&fdm->rgn[i])) { |
| 631 | qemu_log_mask(LOG_GUEST_ERROR, |
| 632 | "FADump: Failed to store CPU State Data"); |
| 633 | fdm->header.dump_status_flag |= |
| 634 | cpu_to_be16(FADUMP_STATUS_DUMP_ERROR); |
| 635 | |
| 636 | return false; |
| 637 | } |
| 638 | |
| 639 | break; |
| 640 | case FADUMP_HPTE_REGION: |
| 641 | /* TODO: Add hpte state data */ |
| 642 | break; |
| 643 | case FADUMP_REAL_MODE_REGION: |
| 644 | case FADUMP_PARAM_AREA: |
| 645 | /* Copy the memory region from region's source to its destination */ |
| 646 | if (!do_preserve_region(&fdm->rgn[i])) { |
| 647 | qemu_log_mask(LOG_GUEST_ERROR, |
| 648 | "FADump: Failed to preserve dump section: %d\n", |
| 649 | be16_to_cpu(fdm->rgn[i].source_data_type)); |
| 650 | fdm->header.dump_status_flag |= |
| 651 | cpu_to_be16(FADUMP_STATUS_DUMP_ERROR); |
| 652 | } |
| 653 | |
| 654 | break; |
| 655 | default: |
| 656 | qemu_log_mask(LOG_GUEST_ERROR, |
| 657 | "FADump: Skipping unknown source data type: %d\n", data_type); |
| 658 | |
| 659 | fdm->rgn[i].error_flags = |
| 660 | cpu_to_be16(FADUMP_ERROR_INVALID_DATA_TYPE); |
| 661 | } |
| 662 | } |
| 663 | |
| 664 | return true; |
| 665 | } |
| 666 | |
| 667 | /* |
| 668 | * Trigger a fadump boot, ie. next boot will be a crashkernel/fadump boot |
| 669 | * with fadump dump active. |
| 670 | * |
| 671 | * This is triggered by ibm,os-term RTAS call, if fadump was registered. |
| 672 | * |
| 673 | * It preserves the memory and sets 'FADUMP_STATUS_DUMP_TRIGGERED' as |
| 674 | * fadump status, which can be used later to add the "ibm,kernel-dump" |
| 675 | * device tree node as presence of 'FADUMP_STATUS_DUMP_TRIGGERED' signifies |
| 676 | * next boot as fadump boot in our case |
| 677 | */ |
| 678 | void trigger_fadump_boot(SpaprMachineState *spapr, target_ulong spapr_retcode) |
| 679 | { |
| 680 | FadumpSectionHeader *header = &spapr->registered_fdm.header; |
| 681 | |
| 682 | pause_all_vcpus(); |
| 683 | |
| 684 | /* Preserve the memory locations registered for fadump */ |
| 685 | if (!fadump_preserve_mem(spapr)) { |
| 686 | /* Failed to preserve the registered memory regions */ |
| 687 | rtas_st(spapr_retcode, 0, RTAS_OUT_HW_ERROR); |
| 688 | |
| 689 | /* Cause a reboot */ |
| 690 | qemu_system_guest_panicked(NULL); |
| 691 | return; |
| 692 | } |
| 693 | |
| 694 | /* |
| 695 | * Mark next boot as fadump boot |
| 696 | * |
| 697 | * Note: These is some bit of assumption involved here, as PAPR doesn't |
| 698 | * specify any use of the dump status flags, nor does the kernel use it |
| 699 | * |
| 700 | * But from description in Table 136 in PAPR v2.13, it looks like: |
| 701 | * FADUMP_STATUS_DUMP_TRIGGERED |
| 702 | * = Dump was triggered by the previous system boot (PAPR says) |
| 703 | * = Next boot will be a fadump boot (Assumed) |
| 704 | * |
| 705 | * FADUMP_STATUS_DUMP_PERFORMED |
| 706 | * = Dump performed (Set to 0 by caller of the |
| 707 | * ibm,configure-kernel-dump call) (PAPR says) |
| 708 | * = Firmware has performed the copying/dump of requested regions |
| 709 | * (Assumed) |
| 710 | * = Dump is active for the next boot (Assumed) |
| 711 | */ |
| 712 | header->dump_status_flag = cpu_to_be16( |
| 713 | FADUMP_STATUS_DUMP_TRIGGERED | /* Next boot will be fadump boot */ |
| 714 | FADUMP_STATUS_DUMP_PERFORMED /* Dump is active */ |
| 715 | ); |
| 716 | |
| 717 | /* Reset fadump_registered for next boot */ |
| 718 | spapr->fadump_registered = false; |
| 719 | spapr->fadump_dump_active = true; |
| 720 | |
| 721 | /* |
| 722 | * Then do a guest reset |
| 723 | * |
| 724 | * Requirement: |
| 725 | * GUEST_RESET is expected to NOT clear the memory, as is the case when |
| 726 | * this is merged |
| 727 | */ |
| 728 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
| 729 | |
| 730 | rtas_st(spapr_retcode, 0, RTAS_OUT_SUCCESS); |
| 731 | } |