| 1 | /* |
| 2 | * QEMU RISC-V Advanced Interrupt Architecture (AIA) |
| 3 | * |
| 4 | * Copyright (C) 2019 Western Digital Corporation or its affiliates. |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 7 | */ |
| 8 | |
| 9 | #ifndef HW_RISCV_AIA_H |
| 10 | #define HW_RISCV_AIA_H |
| 11 | |
| 12 | #include "exec/hwaddr.h" |
| 13 | |
| 14 | uint32_t imsic_num_bits(uint32_t count); |
| 15 | |
| 16 | DeviceState *riscv_create_aia(bool msimode, int aia_guests, |
| 17 | uint32_t m_imsic_stride, |
| 18 | uint16_t num_sources, |
| 19 | const MemMapEntry *aplic_m, |
| 20 | const MemMapEntry *aplic_s, |
| 21 | const MemMapEntry *imsic_m, |
| 22 | const MemMapEntry *imsic_s, |
| 23 | int socket, int base_hartid, int hart_count, |
| 24 | uint32_t num_msis, uint32_t num_prio_bits); |
| 25 | |
| 26 | #endif |