| 1 | /* |
| 2 | * RISC-V IOMMU - Hardware Performance Monitor (HPM) helpers |
| 3 | * |
| 4 | * Copyright (C) 2022-2023 Rivos Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms and conditions of the GNU General Public License, |
| 8 | * version 2 or later, as published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License along |
| 16 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 17 | */ |
| 18 | |
| 19 | #ifndef HW_RISCV_IOMMU_HPM_H |
| 20 | #define HW_RISCV_IOMMU_HPM_H |
| 21 | |
| 22 | #include "qom/object.h" |
| 23 | #include "hw/riscv/riscv-iommu.h" |
| 24 | |
| 25 | uint64_t riscv_iommu_hpmcycle_read(RISCVIOMMUState *s); |
| 26 | void riscv_iommu_hpm_incr_ctr(RISCVIOMMUState *s, RISCVIOMMUContext *ctx, |
| 27 | unsigned event_id); |
| 28 | void riscv_iommu_hpm_timer_cb(void *priv); |
| 29 | void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh); |
| 30 | void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s); |
| 31 | void riscv_iommu_process_hpmevt_write(RISCVIOMMUState *s, uint32_t evt_reg); |
| 32 | |
| 33 | #endif |