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1 /*
2 * s390 PCI BUS
3 *
4 * Copyright 2014 IBM Corp.
5 * Author(s): Frank Blaschka <frank.blaschka@de.ibm.com>
6 * Hong Bo Li <lihbbj@cn.ibm.com>
7 * Yi Min Zhao <zyimin@cn.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or (at
10 * your option) any later version. See the COPYING file in the top-level
11 * directory.
12 */
13
14 #include "qemu/osdep.h"
15 #include "qapi/error.h"
16 #include "qapi/visitor.h"
17 #include "exec/target_page.h"
18 #include "hw/s390x/s390-pci-bus.h"
19 #include "hw/s390x/s390-pci-inst.h"
20 #include "hw/s390x/s390-pci-kvm.h"
21 #include "hw/s390x/s390-pci-vfio.h"
22 #include "hw/s390x/s390-virtio-ccw.h"
23 #include "hw/core/boards.h"
24 #include "hw/pci/pci_bus.h"
25 #include "hw/core/qdev-properties.h"
26 #include "hw/pci/pci_bridge.h"
27 #include "hw/pci/msi.h"
28 #include "exec/cpu-common.h"
29 #include "qemu/error-report.h"
30 #include "qemu/module.h"
31 #include "system/physmem.h"
32 #include "system/reset.h"
33 #include "system/runstate.h"
34
35 #include "trace.h"
36
37 S390pciState *s390_get_phb(void)
38 {
39 static S390pciState *phb;
40
41 if (!phb) {
42 phb = S390_PCI_HOST_BRIDGE(
43 object_resolve_path(TYPE_S390_PCI_HOST_BRIDGE, NULL));
44 assert(phb != NULL);
45 }
46
47 return phb;
48 }
49
50 int pci_chsc_sei_nt2_get_event(void *res)
51 {
52 ChscSeiNt2Res *nt2_res = (ChscSeiNt2Res *)res;
53 PciCcdfAvail *accdf;
54 PciCcdfErr *eccdf;
55 int rc = 1;
56 SeiContainer *sei_cont;
57 S390pciState *s = s390_get_phb();
58
59 sei_cont = QTAILQ_FIRST(&s->pending_sei);
60 if (sei_cont) {
61 QTAILQ_REMOVE(&s->pending_sei, sei_cont, link);
62 nt2_res->nt = 2;
63 nt2_res->cc = sei_cont->cc;
64 nt2_res->length = cpu_to_be16(sizeof(ChscSeiNt2Res));
65 switch (sei_cont->cc) {
66 case 1: /* error event */
67 eccdf = (PciCcdfErr *)nt2_res->ccdf;
68 eccdf->fid = cpu_to_be32(sei_cont->fid);
69 eccdf->fh = cpu_to_be32(sei_cont->fh);
70 eccdf->e = cpu_to_be32(sei_cont->e);
71 eccdf->faddr = cpu_to_be64(sei_cont->faddr);
72 eccdf->pec = cpu_to_be16(sei_cont->pec);
73 break;
74 case 2: /* availability event */
75 accdf = (PciCcdfAvail *)nt2_res->ccdf;
76 accdf->fid = cpu_to_be32(sei_cont->fid);
77 accdf->fh = cpu_to_be32(sei_cont->fh);
78 accdf->pec = cpu_to_be16(sei_cont->pec);
79 break;
80 default:
81 abort();
82 }
83 g_free(sei_cont);
84 rc = 0;
85 }
86
87 return rc;
88 }
89
90 int pci_chsc_sei_nt2_have_event(void)
91 {
92 S390pciState *s = s390_get_phb();
93
94 return !QTAILQ_EMPTY(&s->pending_sei);
95 }
96
97 S390PCIBusDevice *s390_pci_find_next_avail_dev(S390pciState *s,
98 S390PCIBusDevice *pbdev)
99 {
100 S390PCIBusDevice *ret = pbdev ? QTAILQ_NEXT(pbdev, link) :
101 QTAILQ_FIRST(&s->zpci_devs);
102
103 while (ret && ret->state == ZPCI_FS_RESERVED) {
104 ret = QTAILQ_NEXT(ret, link);
105 }
106
107 return ret;
108 }
109
110 S390PCIBusDevice *s390_pci_find_dev_by_fid(S390pciState *s, uint32_t fid)
111 {
112 S390PCIBusDevice *pbdev;
113
114 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
115 if (pbdev->fid == fid) {
116 return pbdev;
117 }
118 }
119
120 return NULL;
121 }
122
123 void s390_pci_sclp_configure(SCCB *sccb)
124 {
125 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb;
126 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
127 be32_to_cpu(psccb->aid));
128 uint16_t rc;
129
130 if (!pbdev) {
131 trace_s390_pci_sclp_nodev("configure", be32_to_cpu(psccb->aid));
132 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
133 goto out;
134 }
135
136 switch (pbdev->state) {
137 case ZPCI_FS_RESERVED:
138 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
139 break;
140 case ZPCI_FS_STANDBY:
141 pbdev->state = ZPCI_FS_DISABLED;
142 rc = SCLP_RC_NORMAL_COMPLETION;
143 break;
144 default:
145 rc = SCLP_RC_NO_ACTION_REQUIRED;
146 }
147 out:
148 psccb->header.response_code = cpu_to_be16(rc);
149 }
150
151 static void s390_pci_shutdown_notifier(Notifier *n, void *opaque)
152 {
153 S390PCIBusDevice *pbdev = container_of(n, S390PCIBusDevice,
154 shutdown_notifier);
155
156 pci_device_reset(pbdev->pdev);
157 }
158
159 static void s390_pci_perform_unplug(S390PCIBusDevice *pbdev)
160 {
161 HotplugHandler *hotplug_ctrl;
162
163 if (pbdev->pft == ZPCI_PFT_ISM) {
164 notifier_remove(&pbdev->shutdown_notifier);
165 }
166
167 /* Unplug the PCI device */
168 if (pbdev->pdev) {
169 DeviceState *pdev = DEVICE(pbdev->pdev);
170
171 hotplug_ctrl = qdev_get_hotplug_handler(pdev);
172 hotplug_handler_unplug(hotplug_ctrl, pdev, &error_abort);
173 object_unparent(OBJECT(pdev));
174 }
175
176 /* Unplug the zPCI device */
177 hotplug_ctrl = qdev_get_hotplug_handler(DEVICE(pbdev));
178 hotplug_handler_unplug(hotplug_ctrl, DEVICE(pbdev), &error_abort);
179 object_unparent(OBJECT(pbdev));
180 }
181
182 void s390_pci_sclp_deconfigure(SCCB *sccb)
183 {
184 IoaCfgSccb *psccb = (IoaCfgSccb *)sccb;
185 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_fid(s390_get_phb(),
186 be32_to_cpu(psccb->aid));
187 uint16_t rc;
188
189 if (!pbdev) {
190 trace_s390_pci_sclp_nodev("deconfigure", be32_to_cpu(psccb->aid));
191 rc = SCLP_RC_ADAPTER_ID_NOT_RECOGNIZED;
192 goto out;
193 }
194
195 switch (pbdev->state) {
196 case ZPCI_FS_RESERVED:
197 rc = SCLP_RC_ADAPTER_IN_RESERVED_STATE;
198 break;
199 case ZPCI_FS_STANDBY:
200 rc = SCLP_RC_NO_ACTION_REQUIRED;
201 break;
202 default:
203 if (pbdev->interp && (pbdev->fh & FH_MASK_ENABLE)) {
204 /* Interpreted devices were using interrupt forwarding */
205 s390_pci_kvm_aif_disable(pbdev);
206 } else if (pbdev->summary_ind) {
207 pci_dereg_irqs(pbdev);
208 }
209 if (pbdev->iommu->enabled) {
210 pci_dereg_ioat(pbdev->iommu);
211 }
212 pbdev->state = ZPCI_FS_STANDBY;
213 rc = SCLP_RC_NORMAL_COMPLETION;
214
215 if (pbdev->unplug_requested) {
216 s390_pci_perform_unplug(pbdev);
217 }
218 }
219 out:
220 psccb->header.response_code = cpu_to_be16(rc);
221 }
222
223 static S390PCIBusDevice *s390_pci_find_dev_by_uid(S390pciState *s, uint16_t uid)
224 {
225 S390PCIBusDevice *pbdev;
226
227 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
228 if (pbdev->uid == uid) {
229 return pbdev;
230 }
231 }
232
233 return NULL;
234 }
235
236 S390PCIBusDevice *s390_pci_find_dev_by_target(S390pciState *s,
237 const char *target)
238 {
239 S390PCIBusDevice *pbdev;
240
241 if (!target) {
242 return NULL;
243 }
244
245 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
246 if (!strcmp(pbdev->target, target)) {
247 return pbdev;
248 }
249 }
250
251 return NULL;
252 }
253
254 S390PCIBusDevice *s390_pci_find_dev_by_pci(S390pciState *s, PCIDevice *pci_dev)
255 {
256 S390PCIBusDevice *pbdev;
257
258 if (!pci_dev) {
259 return NULL;
260 }
261
262 QTAILQ_FOREACH(pbdev, &s->zpci_devs, link) {
263 if (pbdev->pdev == pci_dev) {
264 return pbdev;
265 }
266 }
267
268 return NULL;
269 }
270
271 S390PCIBusDevice *s390_pci_find_dev_by_idx(S390pciState *s, uint32_t idx)
272 {
273 return g_hash_table_lookup(s->zpci_table, &idx);
274 }
275
276 S390PCIBusDevice *s390_pci_find_dev_by_fh(S390pciState *s, uint32_t fh)
277 {
278 uint32_t idx = FH_MASK_INDEX & fh;
279 S390PCIBusDevice *pbdev = s390_pci_find_dev_by_idx(s, idx);
280
281 if (pbdev && pbdev->fh == fh) {
282 return pbdev;
283 }
284
285 return NULL;
286 }
287
288 static void s390_pci_generate_event(uint8_t cc, uint16_t pec, uint32_t fh,
289 uint32_t fid, uint64_t faddr, uint32_t e)
290 {
291 SeiContainer *sei_cont;
292 S390pciState *s = s390_get_phb();
293
294 sei_cont = g_new0(SeiContainer, 1);
295 sei_cont->fh = fh;
296 sei_cont->fid = fid;
297 sei_cont->cc = cc;
298 sei_cont->pec = pec;
299 sei_cont->faddr = faddr;
300 sei_cont->e = e;
301
302 QTAILQ_INSERT_TAIL(&s->pending_sei, sei_cont, link);
303 css_generate_css_crws(0);
304 }
305
306 static void s390_pci_generate_plug_event(uint16_t pec, uint32_t fh,
307 uint32_t fid)
308 {
309 s390_pci_generate_event(2, pec, fh, fid, 0, 0);
310 }
311
312 void s390_pci_generate_error_event(uint16_t pec, uint32_t fh, uint32_t fid,
313 uint64_t faddr, uint32_t e)
314 {
315 s390_pci_generate_event(1, pec, fh, fid, faddr, e);
316 }
317
318 static void s390_pci_set_irq(void *opaque, int irq, int level)
319 {
320 /* nothing to do */
321 }
322
323 static int s390_pci_map_irq(PCIDevice *pci_dev, int irq_num)
324 {
325 /* nothing to do */
326 return 0;
327 }
328
329 static uint64_t s390_pci_get_table_origin(uint64_t iota)
330 {
331 return iota & ~ZPCI_IOTA_RTTO_FLAG;
332 }
333
334 static unsigned int calc_rtx(dma_addr_t ptr)
335 {
336 return ((unsigned long) ptr >> ZPCI_RT_SHIFT) & ZPCI_INDEX_MASK;
337 }
338
339 static unsigned int calc_sx(dma_addr_t ptr)
340 {
341 return ((unsigned long) ptr >> ZPCI_ST_SHIFT) & ZPCI_INDEX_MASK;
342 }
343
344 static unsigned int calc_px(dma_addr_t ptr)
345 {
346 return ((unsigned long) ptr >> TARGET_PAGE_BITS) & ZPCI_PT_MASK;
347 }
348
349 static uint64_t get_rt_sto(uint64_t entry)
350 {
351 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_RTX)
352 ? (entry & ZPCI_RTE_ADDR_MASK)
353 : 0;
354 }
355
356 static uint64_t get_st_pto(uint64_t entry)
357 {
358 return ((entry & ZPCI_TABLE_TYPE_MASK) == ZPCI_TABLE_TYPE_SX)
359 ? (entry & ZPCI_STE_ADDR_MASK)
360 : 0;
361 }
362
363 static bool rt_entry_isvalid(uint64_t entry)
364 {
365 return (entry & ZPCI_TABLE_VALID_MASK) == ZPCI_TABLE_VALID;
366 }
367
368 static bool pt_entry_isvalid(uint64_t entry)
369 {
370 return (entry & ZPCI_PTE_VALID_MASK) == ZPCI_PTE_VALID;
371 }
372
373 static bool entry_isprotected(uint64_t entry)
374 {
375 return (entry & ZPCI_TABLE_PROT_MASK) == ZPCI_TABLE_PROTECTED;
376 }
377
378 /* ett is expected table type, -1 page table, 0 segment table, 1 region table */
379 static uint64_t get_table_index(uint64_t iova, int8_t ett)
380 {
381 switch (ett) {
382 case ZPCI_ETT_PT:
383 return calc_px(iova);
384 case ZPCI_ETT_ST:
385 return calc_sx(iova);
386 case ZPCI_ETT_RT:
387 return calc_rtx(iova);
388 default:
389 g_assert_not_reached();
390 }
391 }
392
393 static bool entry_isvalid(uint64_t entry, int8_t ett)
394 {
395 switch (ett) {
396 case ZPCI_ETT_PT:
397 return pt_entry_isvalid(entry);
398 case ZPCI_ETT_ST:
399 case ZPCI_ETT_RT:
400 return rt_entry_isvalid(entry);
401 default:
402 g_assert_not_reached();
403 }
404 }
405
406 /* Return true if address translation is done */
407 static bool translate_iscomplete(uint64_t entry, int8_t ett)
408 {
409 switch (ett) {
410 case ZPCI_ETT_ST:
411 return (entry & ZPCI_TABLE_FC) ? true : false;
412 case ZPCI_ETT_RT:
413 return false;
414 case ZPCI_ETT_PT:
415 return true;
416 default:
417 g_assert_not_reached();
418 }
419 }
420
421 static uint64_t get_frame_size(int8_t ett)
422 {
423 switch (ett) {
424 case ZPCI_ETT_PT:
425 return 1ULL << 12;
426 case ZPCI_ETT_ST:
427 return 1ULL << 20;
428 case ZPCI_ETT_RT:
429 return 1ULL << 31;
430 default:
431 g_assert_not_reached();
432 }
433 }
434
435 static uint64_t get_next_table_origin(uint64_t entry, int8_t ett)
436 {
437 switch (ett) {
438 case ZPCI_ETT_PT:
439 return entry & ZPCI_PTE_ADDR_MASK;
440 case ZPCI_ETT_ST:
441 return get_st_pto(entry);
442 case ZPCI_ETT_RT:
443 return get_rt_sto(entry);
444 default:
445 g_assert_not_reached();
446 }
447 }
448
449 /**
450 * table_translate: do translation within one table and return the following
451 * table origin
452 *
453 * @entry: the entry being translated, the result is stored in this.
454 * @to: the address of table origin.
455 * @ett: expected table type, 1 region table, 0 segment table and -1 page table.
456 * @error: error code
457 */
458 static uint64_t table_translate(S390IOTLBEntry *entry, uint64_t to, int8_t ett,
459 uint16_t *error)
460 {
461 uint64_t tx, te, nto = 0;
462 uint16_t err = 0;
463
464 tx = get_table_index(entry->iova, ett);
465 te = address_space_ldq_be(&address_space_memory, to + tx * sizeof(uint64_t),
466 MEMTXATTRS_UNSPECIFIED, NULL);
467
468 if (!te) {
469 err = ERR_EVENT_INVALTE;
470 goto out;
471 }
472
473 if (!entry_isvalid(te, ett)) {
474 entry->perm &= IOMMU_NONE;
475 goto out;
476 }
477
478 if (ett == ZPCI_ETT_RT && ((te & ZPCI_TABLE_LEN_RTX) != ZPCI_TABLE_LEN_RTX
479 || te & ZPCI_TABLE_OFFSET_MASK)) {
480 err = ERR_EVENT_INVALTL;
481 goto out;
482 }
483
484 nto = get_next_table_origin(te, ett);
485 if (!nto) {
486 err = ERR_EVENT_TT;
487 goto out;
488 }
489
490 if (entry_isprotected(te)) {
491 entry->perm &= IOMMU_RO;
492 } else {
493 entry->perm &= IOMMU_RW;
494 }
495
496 if (translate_iscomplete(te, ett)) {
497 switch (ett) {
498 case ZPCI_ETT_PT:
499 entry->translated_addr = te & ZPCI_PTE_ADDR_MASK;
500 break;
501 case ZPCI_ETT_ST:
502 entry->translated_addr = (te & ZPCI_SFAA_MASK) |
503 (entry->iova & ~ZPCI_SFAA_MASK);
504 break;
505 }
506 nto = 0;
507 }
508 out:
509 if (err) {
510 entry->perm = IOMMU_NONE;
511 *error = err;
512 }
513 entry->len = get_frame_size(ett);
514 return nto;
515 }
516
517 uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwaddr addr,
518 S390IOTLBEntry *entry)
519 {
520 uint64_t to = s390_pci_get_table_origin(g_iota);
521 int8_t ett = 1;
522 uint16_t error = 0;
523
524 entry->iova = addr & TARGET_PAGE_MASK;
525 entry->translated_addr = 0;
526 entry->perm = IOMMU_RW;
527
528 if (entry_isprotected(g_iota)) {
529 entry->perm &= IOMMU_RO;
530 }
531
532 while (to) {
533 to = table_translate(entry, to, ett--, &error);
534 }
535
536 return error;
537 }
538
539 static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr addr,
540 IOMMUAccessFlags flag, int iommu_idx)
541 {
542 S390PCIIOMMU *iommu = container_of(mr, S390PCIIOMMU, iommu_mr);
543 S390IOTLBEntry *entry;
544 uint64_t iova = addr & TARGET_PAGE_MASK;
545 uint16_t error = 0;
546 IOMMUTLBEntry ret = {
547 .target_as = &address_space_memory,
548 .iova = 0,
549 .translated_addr = 0,
550 .addr_mask = ~(hwaddr)0,
551 .perm = IOMMU_NONE,
552 };
553
554 switch (iommu->pbdev->state) {
555 case ZPCI_FS_ENABLED:
556 case ZPCI_FS_BLOCKED:
557 if (!iommu->enabled) {
558 return ret;
559 }
560 break;
561 default:
562 return ret;
563 }
564
565 trace_s390_pci_iommu_xlate(addr);
566
567 if (addr < iommu->pba || addr > iommu->pal) {
568 error = ERR_EVENT_OORANGE;
569 goto err;
570 }
571
572 entry = g_hash_table_lookup(iommu->iotlb, &iova);
573 if (entry) {
574 ret.iova = entry->iova;
575 ret.translated_addr = entry->translated_addr;
576 ret.addr_mask = entry->len - 1;
577 ret.perm = entry->perm;
578 } else {
579 ret.iova = iova;
580 ret.addr_mask = ~TARGET_PAGE_MASK;
581 ret.perm = IOMMU_NONE;
582 }
583
584 if (flag != IOMMU_NONE && !(flag & ret.perm)) {
585 error = ERR_EVENT_TPROTE;
586 }
587 err:
588 if (error) {
589 iommu->pbdev->state = ZPCI_FS_ERROR;
590 s390_pci_generate_error_event(error, iommu->pbdev->fh,
591 iommu->pbdev->fid, addr, 0);
592 }
593 return ret;
594 }
595
596 static void s390_pci_iommu_replay(IOMMUMemoryRegion *iommu,
597 IOMMUNotifier *notifier)
598 {
599 /* It's impossible to plug a pci device on s390x that already has iommu
600 * mappings which need to be replayed, that is due to the "one iommu per
601 * zpci device" construct. But when we support migration of vfio-pci
602 * devices in future, we need to revisit this.
603 */
604 }
605
606 static S390PCIIOMMU *s390_pci_get_iommu(S390pciState *s, PCIBus *bus,
607 int devfn)
608 {
609 uint64_t key = (uintptr_t)bus;
610 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
611 S390PCIIOMMU *iommu;
612
613 if (!table) {
614 table = g_new0(S390PCIIOMMUTable, 1);
615 table->key = key;
616 g_hash_table_insert(s->iommu_table, &table->key, table);
617 }
618
619 iommu = table->iommu[PCI_SLOT(devfn)];
620 if (!iommu) {
621 iommu = S390_PCI_IOMMU(object_new(TYPE_S390_PCI_IOMMU));
622
623 char *mr_name = g_strdup_printf("iommu-root-%02x:%02x.%01x",
624 pci_bus_num(bus),
625 PCI_SLOT(devfn),
626 PCI_FUNC(devfn));
627 char *as_name = g_strdup_printf("iommu-pci-%02x:%02x.%01x",
628 pci_bus_num(bus),
629 PCI_SLOT(devfn),
630 PCI_FUNC(devfn));
631 memory_region_init(&iommu->mr, OBJECT(iommu), mr_name, UINT64_MAX);
632 address_space_init(&iommu->as, &iommu->mr, as_name);
633 iommu->iotlb = g_hash_table_new_full(g_int64_hash, g_int64_equal,
634 NULL, g_free);
635 table->iommu[PCI_SLOT(devfn)] = iommu;
636
637 g_free(mr_name);
638 g_free(as_name);
639 }
640
641 return iommu;
642 }
643
644 static AddressSpace *s390_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
645 {
646 S390pciState *s = opaque;
647 S390PCIIOMMU *iommu = s390_pci_get_iommu(s, bus, devfn);
648
649 return &iommu->as;
650 }
651
652 static const PCIIOMMUOps s390_iommu_ops = {
653 .get_address_space = s390_pci_dma_iommu,
654 };
655
656 /**
657 * set_ind_bit_atomic - Atomically set a bit in an indicator
658 *
659 * @ind_loc: Address of the indicator
660 * @to_be_set: Bit to set
661 *
662 * Returns true if the bit was set by this function, false if it was
663 * already set or mapping failed.
664 */
665 static bool set_ind_bit_atomic(uint64_t ind_loc, uint8_t to_be_set)
666 {
667 uint8_t expected, actual;
668 hwaddr len = 1;
669 /* avoid multiple fetches */
670 uint8_t volatile *ind_addr;
671
672 ind_addr = physical_memory_map(ind_loc, &len, true);
673 if (!ind_addr) {
674 s390_pci_generate_error_event(ERR_EVENT_AIRERR, 0, 0, 0, 0);
675 return false;
676 }
677 actual = *ind_addr;
678 do {
679 expected = actual;
680 actual = qatomic_cmpxchg(ind_addr, expected, expected | to_be_set);
681 } while (actual != expected);
682 physical_memory_unmap((void *)ind_addr, len, 1, len);
683
684 return (actual & to_be_set) ? false : true;
685 }
686
687 static void s390_msi_ctrl_write(void *opaque, hwaddr addr, uint64_t data,
688 unsigned int size)
689 {
690 S390PCIBusDevice *pbdev = opaque;
691 uint32_t vec = data & ZPCI_MSI_VEC_MASK;
692 uint64_t ind_bit;
693 uint32_t sum_bit;
694
695 assert(pbdev);
696
697 trace_s390_pci_msi_ctrl_write(data, pbdev->idx, vec);
698
699 if (pbdev->state != ZPCI_FS_ENABLED) {
700 return;
701 }
702
703 ind_bit = pbdev->routes.adapter.ind_offset;
704 sum_bit = pbdev->routes.adapter.summary_offset;
705
706 set_ind_bit_atomic(pbdev->routes.adapter.ind_addr + (ind_bit + vec) / 8,
707 0x80 >> ((ind_bit + vec) % 8));
708 if (set_ind_bit_atomic(pbdev->routes.adapter.summary_addr + sum_bit / 8,
709 0x80 >> (sum_bit % 8))) {
710 css_adapter_interrupt(CSS_IO_ADAPTER_PCI, pbdev->isc);
711 }
712 }
713
714 static uint64_t s390_msi_ctrl_read(void *opaque, hwaddr addr, unsigned size)
715 {
716 return 0xffffffff;
717 }
718
719 static const MemoryRegionOps s390_msi_ctrl_ops = {
720 .write = s390_msi_ctrl_write,
721 .read = s390_msi_ctrl_read,
722 .endianness = DEVICE_LITTLE_ENDIAN,
723 };
724
725 void s390_pci_iommu_enable(S390PCIIOMMU *iommu)
726 {
727 /*
728 * The iommu region is initialized against a 0-mapped address space,
729 * so the smallest IOMMU region we can define runs from 0 to the end
730 * of the PCI address space.
731 */
732 char *name = g_strdup_printf("iommu-s390-%04x", iommu->pbdev->uid);
733 memory_region_init_iommu(&iommu->iommu_mr, sizeof(iommu->iommu_mr),
734 TYPE_S390_IOMMU_MEMORY_REGION, OBJECT(&iommu->mr),
735 name, iommu->pal + 1);
736 iommu->enabled = true;
737 memory_region_add_subregion(&iommu->mr, 0, MEMORY_REGION(&iommu->iommu_mr));
738 g_free(name);
739 }
740
741 void s390_pci_iommu_direct_map_enable(S390PCIIOMMU *iommu)
742 {
743 MachineState *ms = MACHINE(qdev_get_machine());
744 S390CcwMachineState *s390ms = S390_CCW_MACHINE(ms);
745
746 /*
747 * For direct-mapping we must map the entire guest address space. Rather
748 * than using an iommu, create a memory region alias that maps GPA X to
749 * IOVA X + SDMA. VFIO will handle pinning via its memory listener.
750 */
751 g_autofree char *name = g_strdup_printf("iommu-dm-s390-%04x",
752 iommu->pbdev->uid);
753
754 iommu->dm_mr = g_malloc0(sizeof(*iommu->dm_mr));
755 memory_region_init_alias(iommu->dm_mr, OBJECT(&iommu->mr), name,
756 get_system_memory(), 0,
757 s390_get_memory_limit(s390ms));
758 iommu->enabled = true;
759 memory_region_add_subregion(&iommu->mr, iommu->pbdev->zpci_fn.sdma,
760 iommu->dm_mr);
761 }
762
763 void s390_pci_iommu_disable(S390PCIIOMMU *iommu)
764 {
765 iommu->enabled = false;
766 g_hash_table_remove_all(iommu->iotlb);
767 if (iommu->dm_mr) {
768 memory_region_del_subregion(&iommu->mr, iommu->dm_mr);
769 object_unparent(OBJECT(iommu->dm_mr));
770 g_free(iommu->dm_mr);
771 iommu->dm_mr = NULL;
772 } else {
773 memory_region_del_subregion(&iommu->mr,
774 MEMORY_REGION(&iommu->iommu_mr));
775 object_unparent(OBJECT(&iommu->iommu_mr));
776 }
777 }
778
779 static void s390_pci_iommu_free(S390pciState *s, PCIBus *bus, int32_t devfn)
780 {
781 uint64_t key = (uintptr_t)bus;
782 S390PCIIOMMUTable *table = g_hash_table_lookup(s->iommu_table, &key);
783 S390PCIIOMMU *iommu = table ? table->iommu[PCI_SLOT(devfn)] : NULL;
784
785 if (!table || !iommu) {
786 return;
787 }
788
789 table->iommu[PCI_SLOT(devfn)] = NULL;
790 g_hash_table_destroy(iommu->iotlb);
791 /*
792 * An attached PCI device may have memory listeners, eg. VFIO PCI.
793 * The associated subregion will already have been unmapped in
794 * s390_pci_iommu_disable in response to the guest deconfigure request.
795 * Remove the listeners now before destroying the address space.
796 */
797 address_space_remove_listeners(&iommu->as);
798 address_space_destroy(&iommu->as);
799 object_unparent(OBJECT(&iommu->mr));
800 object_unparent(OBJECT(iommu));
801 object_unref(OBJECT(iommu));
802 }
803
804 S390PCIGroup *s390_group_create(int id, int host_id)
805 {
806 S390PCIGroup *group;
807 S390pciState *s = s390_get_phb();
808
809 group = g_new0(S390PCIGroup, 1);
810 group->id = id;
811 group->host_id = host_id;
812 QTAILQ_INSERT_TAIL(&s->zpci_groups, group, link);
813 return group;
814 }
815
816 S390PCIGroup *s390_group_find(int id)
817 {
818 S390PCIGroup *group;
819 S390pciState *s = s390_get_phb();
820
821 QTAILQ_FOREACH(group, &s->zpci_groups, link) {
822 if (group->id == id) {
823 return group;
824 }
825 }
826 return NULL;
827 }
828
829 S390PCIGroup *s390_group_find_host_sim(int host_id)
830 {
831 S390PCIGroup *group;
832 S390pciState *s = s390_get_phb();
833
834 QTAILQ_FOREACH(group, &s->zpci_groups, link) {
835 if (group->id >= ZPCI_SIM_GRP_START && group->host_id == host_id) {
836 return group;
837 }
838 }
839 return NULL;
840 }
841
842 static void s390_pci_init_default_group(void)
843 {
844 S390PCIGroup *group;
845 ClpRspQueryPciGrp *resgrp;
846
847 group = s390_group_create(ZPCI_DEFAULT_FN_GRP, ZPCI_DEFAULT_FN_GRP);
848 resgrp = &group->zpci_group;
849 resgrp->fr = 1;
850 resgrp->dasm = 0;
851 resgrp->msia = ZPCI_MSI_ADDR;
852 resgrp->mui = DEFAULT_MUI;
853 resgrp->i = 128;
854 resgrp->maxstbl = 128;
855 resgrp->version = 0;
856 resgrp->dtsm = ZPCI_DTSM;
857 }
858
859 static void set_pbdev_info(S390PCIBusDevice *pbdev)
860 {
861 pbdev->zpci_fn.sdma = ZPCI_SDMA_ADDR;
862 pbdev->zpci_fn.edma = ZPCI_EDMA_ADDR;
863 pbdev->zpci_fn.pchid = 0;
864 pbdev->zpci_fn.pfgid = ZPCI_DEFAULT_FN_GRP;
865 pbdev->zpci_fn.fid = pbdev->fid;
866 pbdev->zpci_fn.uid = pbdev->uid;
867 pbdev->pci_group = s390_group_find(ZPCI_DEFAULT_FN_GRP);
868 }
869
870 static void s390_pcihost_realize(DeviceState *dev, Error **errp)
871 {
872 PCIBus *b;
873 BusState *bus;
874 PCIHostState *phb = PCI_HOST_BRIDGE(dev);
875 S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
876
877 trace_s390_pcihost("realize");
878
879 b = pci_register_root_bus(dev, NULL, s390_pci_set_irq, s390_pci_map_irq,
880 NULL, get_system_memory(), get_system_io(), 0,
881 64, TYPE_PCI_BUS);
882 pci_setup_iommu(b, &s390_iommu_ops, s);
883
884 bus = BUS(b);
885 qbus_set_hotplug_handler(bus, OBJECT(dev));
886 phb->bus = b;
887
888 s->bus = S390_PCI_BUS(qbus_new(TYPE_S390_PCI_BUS, dev, NULL));
889 qbus_set_hotplug_handler(BUS(s->bus), OBJECT(dev));
890
891 s->iommu_table = g_hash_table_new_full(g_int64_hash, g_int64_equal,
892 NULL, g_free);
893 s->zpci_table = g_hash_table_new_full(g_int_hash, g_int_equal, NULL, NULL);
894 s->bus_no = 0;
895 s->next_sim_grp = ZPCI_SIM_GRP_START;
896 QTAILQ_INIT(&s->pending_sei);
897 QTAILQ_INIT(&s->zpci_devs);
898 QTAILQ_INIT(&s->zpci_dma_limit);
899 QTAILQ_INIT(&s->zpci_groups);
900
901 s390_pci_init_default_group();
902 css_register_io_adapters(CSS_IO_ADAPTER_PCI, true, false,
903 S390_ADAPTER_SUPPRESSIBLE, errp);
904 s390_pcihost_kvm_realize();
905 }
906
907 static void s390_pcihost_unrealize(DeviceState *dev)
908 {
909 S390PCIGroup *group;
910 S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
911
912 while (!QTAILQ_EMPTY(&s->zpci_groups)) {
913 group = QTAILQ_FIRST(&s->zpci_groups);
914 QTAILQ_REMOVE(&s->zpci_groups, group, link);
915 }
916 }
917
918 static int s390_pci_msix_init(S390PCIBusDevice *pbdev)
919 {
920 char *name;
921 uint8_t pos;
922 uint16_t ctrl;
923 uint32_t table, pba;
924
925 pos = pci_find_capability(pbdev->pdev, PCI_CAP_ID_MSIX);
926 if (!pos) {
927 return -1;
928 }
929
930 ctrl = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_FLAGS,
931 pci_config_size(pbdev->pdev), sizeof(ctrl));
932 table = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_TABLE,
933 pci_config_size(pbdev->pdev), sizeof(table));
934 pba = pci_host_config_read_common(pbdev->pdev, pos + PCI_MSIX_PBA,
935 pci_config_size(pbdev->pdev), sizeof(pba));
936
937 pbdev->msix.table_bar = table & PCI_MSIX_FLAGS_BIRMASK;
938 pbdev->msix.table_offset = table & ~PCI_MSIX_FLAGS_BIRMASK;
939 pbdev->msix.pba_bar = pba & PCI_MSIX_FLAGS_BIRMASK;
940 pbdev->msix.pba_offset = pba & ~PCI_MSIX_FLAGS_BIRMASK;
941 pbdev->msix.entries = (ctrl & PCI_MSIX_FLAGS_QSIZE) + 1;
942
943 name = g_strdup_printf("msix-s390-%04x", pbdev->uid);
944 memory_region_init_io(&pbdev->msix_notify_mr, OBJECT(pbdev),
945 &s390_msi_ctrl_ops, pbdev, name, TARGET_PAGE_SIZE);
946 memory_region_add_subregion(&pbdev->iommu->mr,
947 pbdev->pci_group->zpci_group.msia,
948 &pbdev->msix_notify_mr);
949 g_free(name);
950
951 return 0;
952 }
953
954 static void s390_pci_msix_free(S390PCIBusDevice *pbdev)
955 {
956 if (pbdev->msix.entries == 0) {
957 return;
958 }
959
960 memory_region_del_subregion(&pbdev->iommu->mr, &pbdev->msix_notify_mr);
961 object_unparent(OBJECT(&pbdev->msix_notify_mr));
962 }
963
964 static S390PCIBusDevice *s390_pci_device_new(S390pciState *s,
965 const char *target, Error **errp)
966 {
967 Error *local_err = NULL;
968 DeviceState *dev;
969
970 dev = qdev_try_new(TYPE_S390_PCI_DEVICE);
971 if (!dev) {
972 error_setg(errp, "zPCI device could not be created");
973 return NULL;
974 }
975
976 if (!object_property_set_str(OBJECT(dev), "target", target, &local_err)) {
977 object_unparent(OBJECT(dev));
978 error_propagate_prepend(errp, local_err,
979 "zPCI device could not be created: ");
980 return NULL;
981 }
982 if (!qdev_realize_and_unref(dev, BUS(s->bus), &local_err)) {
983 object_unparent(OBJECT(dev));
984 error_propagate_prepend(errp, local_err,
985 "zPCI device could not be created: ");
986 return NULL;
987 }
988
989 return S390_PCI_DEVICE(dev);
990 }
991
992 static bool s390_pci_alloc_idx(S390pciState *s, S390PCIBusDevice *pbdev)
993 {
994 uint32_t idx;
995
996 idx = s->next_idx;
997 while (s390_pci_find_dev_by_idx(s, idx)) {
998 idx = (idx + 1) & FH_MASK_INDEX;
999 if (idx == s->next_idx) {
1000 return false;
1001 }
1002 }
1003
1004 pbdev->idx = idx;
1005 return true;
1006 }
1007
1008 static void s390_pcihost_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
1009 Error **errp)
1010 {
1011 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
1012
1013 if (!s390_has_feat(S390_FEAT_ZPCI)) {
1014 warn_report("Plugging a PCI/zPCI device without the 'zpci' CPU "
1015 "feature enabled; the guest will not be able to see/use "
1016 "this device");
1017 }
1018
1019 if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1020 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
1021
1022 if (!s390_pci_alloc_idx(s, pbdev)) {
1023 error_setg(errp, "no slot for plugging zpci device");
1024 return;
1025 }
1026 }
1027 }
1028
1029 static void s390_pci_update_subordinate(PCIDevice *dev, uint32_t nr)
1030 {
1031 uint32_t old_nr;
1032
1033 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1);
1034 while (!pci_bus_is_root(pci_get_bus(dev))) {
1035 dev = pci_get_bus(dev)->parent_dev;
1036
1037 old_nr = pci_default_read_config(dev, PCI_SUBORDINATE_BUS, 1);
1038 if (old_nr < nr) {
1039 pci_default_write_config(dev, PCI_SUBORDINATE_BUS, nr, 1);
1040 }
1041 }
1042 }
1043
1044 static int s390_pci_interp_plug(S390pciState *s, S390PCIBusDevice *pbdev)
1045 {
1046 uint32_t idx, fh;
1047
1048 if (!s390_pci_get_host_fh(pbdev, &fh)) {
1049 return -EPERM;
1050 }
1051
1052 /*
1053 * The host device is already in an enabled state, but we always present
1054 * the initial device state to the guest as disabled (ZPCI_FS_DISABLED).
1055 * Therefore, mask off the enable bit from the passthrough handle until
1056 * the guest issues a CLP SET PCI FN later to enable the device.
1057 */
1058 pbdev->fh = fh & ~FH_MASK_ENABLE;
1059
1060 /* Next, see if the idx is already in-use */
1061 idx = pbdev->fh & FH_MASK_INDEX;
1062 if (pbdev->idx != idx) {
1063 if (s390_pci_find_dev_by_idx(s, idx)) {
1064 return -EINVAL;
1065 }
1066 /*
1067 * Update the idx entry with the passed through idx
1068 * If the relinquished idx is lower than next_idx, use it
1069 * to replace next_idx
1070 */
1071 g_hash_table_remove(s->zpci_table, &pbdev->idx);
1072 if (idx < s->next_idx) {
1073 s->next_idx = idx;
1074 }
1075 pbdev->idx = idx;
1076 g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev);
1077 }
1078
1079 return 0;
1080 }
1081
1082 static void s390_pcihost_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
1083 Error **errp)
1084 {
1085 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
1086 PCIDevice *pdev = NULL;
1087 S390PCIBusDevice *pbdev = NULL;
1088 int rc;
1089
1090 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
1091 PCIBridge *pb = PCI_BRIDGE(dev);
1092
1093 pdev = PCI_DEVICE(dev);
1094 pci_bridge_map_irq(pb, dev->id, s390_pci_map_irq);
1095 pci_setup_iommu(&pb->sec_bus, &s390_iommu_ops, s);
1096
1097 qbus_set_hotplug_handler(BUS(&pb->sec_bus), OBJECT(s));
1098
1099 if (dev->hotplugged) {
1100 pci_default_write_config(pdev, PCI_PRIMARY_BUS,
1101 pci_dev_bus_num(pdev), 1);
1102 s->bus_no += 1;
1103 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
1104
1105 s390_pci_update_subordinate(pdev, s->bus_no);
1106 }
1107 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
1108 pdev = PCI_DEVICE(dev);
1109
1110 /*
1111 * Multifunction is not supported due to the lack of CLP. However,
1112 * do not check for multifunction capability for SR-IOV devices because
1113 * SR-IOV devices automatically add the multifunction capability whether
1114 * the user intends to use the functions other than the PF.
1115 */
1116 if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION &&
1117 !pdev->exp.sriov_cap) {
1118 error_setg(errp, "multifunction not supported in s390");
1119 return;
1120 }
1121
1122 if (!dev->id) {
1123 /* In the case the PCI device does not define an id */
1124 /* we generate one based on the PCI address */
1125 dev->id = g_strdup_printf("auto_%02x:%02x.%01x",
1126 pci_dev_bus_num(pdev),
1127 PCI_SLOT(pdev->devfn),
1128 PCI_FUNC(pdev->devfn));
1129 }
1130
1131 pbdev = s390_pci_find_dev_by_target(s, dev->id);
1132 if (!pbdev) {
1133 /*
1134 * VFs are automatically created by PF, and creating zpci for them
1135 * will result in unexpected usage of fids. Currently QEMU does not
1136 * support multifunction for s390x so we don't need zpci for VFs
1137 * anyway.
1138 */
1139 if (pci_is_vf(pdev)) {
1140 return;
1141 }
1142
1143 pbdev = s390_pci_device_new(s, dev->id, errp);
1144 if (!pbdev) {
1145 return;
1146 }
1147 }
1148
1149 pbdev->pdev = pdev;
1150 pbdev->iommu = s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->devfn);
1151 pbdev->iommu->pbdev = pbdev;
1152 pbdev->state = ZPCI_FS_DISABLED;
1153 set_pbdev_info(pbdev);
1154
1155 if (object_dynamic_cast(OBJECT(dev), "vfio-pci")) {
1156 /*
1157 * By default, interpretation is always requested; if the available
1158 * facilities indicate it is not available, fallback to the
1159 * interception model.
1160 */
1161 if (pbdev->interp) {
1162 if (s390_pci_kvm_interp_allowed()) {
1163 rc = s390_pci_interp_plug(s, pbdev);
1164 if (rc) {
1165 error_setg(errp, "Plug failed for zPCI device in "
1166 "interpretation mode: %d", rc);
1167 return;
1168 }
1169 } else {
1170 trace_s390_pcihost("zPCI interpretation missing");
1171 pbdev->interp = false;
1172 pbdev->forwarding_assist = false;
1173 }
1174 }
1175 pbdev->iommu->dma_limit = s390_pci_start_dma_count(s, pbdev);
1176 /* Fill in CLP information passed via the vfio region */
1177 s390_pci_get_clp_info(pbdev);
1178 if (!pbdev->interp) {
1179 /* Do vfio passthrough but intercept for I/O */
1180 pbdev->fh |= FH_SHM_VFIO;
1181 pbdev->forwarding_assist = false;
1182 }
1183 /* Register shutdown notifier and reset callback for ISM devices */
1184 if (pbdev->pft == ZPCI_PFT_ISM) {
1185 pbdev->shutdown_notifier.notify = s390_pci_shutdown_notifier;
1186 qemu_register_shutdown_notifier(&pbdev->shutdown_notifier);
1187 }
1188 } else {
1189 pbdev->fh |= FH_SHM_EMUL;
1190 /* Always intercept emulated devices */
1191 pbdev->interp = false;
1192 pbdev->forwarding_assist = false;
1193 pbdev->rtr_avail = false;
1194 }
1195
1196 if (s390_pci_msix_init(pbdev) && !pbdev->interp) {
1197 error_setg(errp, "MSI-X support is mandatory "
1198 "in the S390 architecture");
1199 return;
1200 }
1201
1202 if (dev->hotplugged) {
1203 s390_pci_generate_plug_event(HP_EVENT_TO_CONFIGURED ,
1204 pbdev->fh, pbdev->fid);
1205 }
1206 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1207 pbdev = S390_PCI_DEVICE(dev);
1208
1209 /* the allocated idx is actually getting used */
1210 s->next_idx = (pbdev->idx + 1) & FH_MASK_INDEX;
1211 pbdev->fh = pbdev->idx;
1212 QTAILQ_INSERT_TAIL(&s->zpci_devs, pbdev, link);
1213 g_hash_table_insert(s->zpci_table, &pbdev->idx, pbdev);
1214 } else {
1215 g_assert_not_reached();
1216 }
1217 }
1218
1219 static void s390_pcihost_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
1220 Error **errp)
1221 {
1222 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
1223 S390PCIBusDevice *pbdev = NULL;
1224
1225 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
1226 PCIDevice *pci_dev = PCI_DEVICE(dev);
1227 PCIBus *bus;
1228 int32_t devfn;
1229
1230 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev));
1231 if (!pbdev) {
1232 g_assert(pci_is_vf(pci_dev));
1233 return;
1234 }
1235
1236 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED,
1237 pbdev->fh, pbdev->fid);
1238 bus = pci_get_bus(pci_dev);
1239 devfn = pci_dev->devfn;
1240 qdev_unrealize(dev);
1241
1242 s390_pci_msix_free(pbdev);
1243 s390_pci_iommu_free(s, bus, devfn);
1244 pbdev->pdev = NULL;
1245 pbdev->state = ZPCI_FS_RESERVED;
1246 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1247 pbdev = S390_PCI_DEVICE(dev);
1248 pbdev->fid = 0;
1249 QTAILQ_REMOVE(&s->zpci_devs, pbdev, link);
1250 g_hash_table_remove(s->zpci_table, &pbdev->idx);
1251 if (pbdev->iommu && pbdev->iommu->dma_limit) {
1252 s390_pci_end_dma_count(s, pbdev->iommu->dma_limit);
1253 }
1254 qdev_unrealize(dev);
1255 }
1256 }
1257
1258 static void s390_pcihost_unplug_request(HotplugHandler *hotplug_dev,
1259 DeviceState *dev,
1260 Error **errp)
1261 {
1262 S390pciState *s = S390_PCI_HOST_BRIDGE(hotplug_dev);
1263 S390PCIBusDevice *pbdev;
1264
1265 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) {
1266 error_setg(errp, "PCI bridge hot unplug currently not supported");
1267 } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
1268 /*
1269 * Redirect the unplug request to the zPCI device and remember that
1270 * we've checked the PCI device already (to prevent endless recursion).
1271 */
1272 pbdev = s390_pci_find_dev_by_pci(s, PCI_DEVICE(dev));
1273 if (!pbdev) {
1274 g_assert(pci_is_vf(PCI_DEVICE(dev)));
1275 return;
1276 }
1277
1278 pbdev->pci_unplug_request_processed = true;
1279 qdev_unplug(DEVICE(pbdev), errp);
1280 } else if (object_dynamic_cast(OBJECT(dev), TYPE_S390_PCI_DEVICE)) {
1281 pbdev = S390_PCI_DEVICE(dev);
1282
1283 /*
1284 * If unplug was initially requested for the zPCI device, we
1285 * first have to redirect to the PCI device, which will in return
1286 * redirect back to us after performing its checks (if the request
1287 * is not blocked, e.g. because it's a PCI bridge).
1288 */
1289 if (pbdev->pdev && !pbdev->pci_unplug_request_processed) {
1290 qdev_unplug(DEVICE(pbdev->pdev), errp);
1291 return;
1292 }
1293 pbdev->pci_unplug_request_processed = false;
1294
1295 switch (pbdev->state) {
1296 case ZPCI_FS_STANDBY:
1297 case ZPCI_FS_RESERVED:
1298 s390_pci_perform_unplug(pbdev);
1299 break;
1300 default:
1301 /*
1302 * Allow to send multiple requests, e.g. if the guest crashed
1303 * before releasing the device, we would not be able to send
1304 * another request to the same VM (e.g. fresh OS).
1305 */
1306 pbdev->unplug_requested = true;
1307 s390_pci_generate_plug_event(HP_EVENT_DECONFIGURE_REQUEST,
1308 pbdev->fh, pbdev->fid);
1309 }
1310 } else {
1311 g_assert_not_reached();
1312 }
1313 }
1314
1315 static void s390_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev,
1316 void *opaque)
1317 {
1318 S390pciState *s = opaque;
1319 PCIBus *sec_bus = NULL;
1320
1321 if ((pci_default_read_config(pdev, PCI_HEADER_TYPE, 1) !=
1322 PCI_HEADER_TYPE_BRIDGE)) {
1323 return;
1324 }
1325
1326 (s->bus_no)++;
1327 pci_default_write_config(pdev, PCI_PRIMARY_BUS, pci_dev_bus_num(pdev), 1);
1328 pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1);
1329 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
1330
1331 sec_bus = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev));
1332 if (!sec_bus) {
1333 return;
1334 }
1335
1336 /* Assign numbers to all child bridges. The last is the highest number. */
1337 pci_for_each_device_under_bus(sec_bus, s390_pci_enumerate_bridge, s);
1338 pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1);
1339 }
1340
1341 void s390_pci_ism_reset(void)
1342 {
1343 S390pciState *s = s390_get_phb();
1344
1345 S390PCIBusDevice *pbdev, *next;
1346
1347 /* Trigger reset event for each passthrough ISM device currently in-use */
1348 QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) {
1349 if (pbdev->interp && pbdev->pft == ZPCI_PFT_ISM &&
1350 pbdev->fh & FH_MASK_ENABLE) {
1351 s390_pci_kvm_aif_disable(pbdev);
1352
1353 pci_device_reset(pbdev->pdev);
1354 }
1355 }
1356 }
1357
1358 static void s390_pcihost_reset(DeviceState *dev)
1359 {
1360 S390pciState *s = S390_PCI_HOST_BRIDGE(dev);
1361 PCIBus *bus = s->parent_obj.bus;
1362 S390PCIBusDevice *pbdev, *next;
1363
1364 /* Process all pending unplug requests */
1365 QTAILQ_FOREACH_SAFE(pbdev, &s->zpci_devs, link, next) {
1366 if (pbdev->unplug_requested) {
1367 if (pbdev->interp && (pbdev->fh & FH_MASK_ENABLE)) {
1368 /* Interpreted devices were using interrupt forwarding */
1369 s390_pci_kvm_aif_disable(pbdev);
1370 } else if (pbdev->summary_ind) {
1371 pci_dereg_irqs(pbdev);
1372 }
1373 if (pbdev->iommu->enabled) {
1374 pci_dereg_ioat(pbdev->iommu);
1375 }
1376 pbdev->state = ZPCI_FS_STANDBY;
1377 s390_pci_perform_unplug(pbdev);
1378 }
1379 }
1380
1381 /*
1382 * When resetting a PCI bridge, the assigned numbers are set to 0. So
1383 * on every system reset, we also have to reassign numbers.
1384 */
1385 s->bus_no = 0;
1386 pci_for_each_device_under_bus(bus, s390_pci_enumerate_bridge, s);
1387 }
1388
1389 static void s390_pcihost_class_init(ObjectClass *klass, const void *data)
1390 {
1391 DeviceClass *dc = DEVICE_CLASS(klass);
1392 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
1393
1394 device_class_set_legacy_reset(dc, s390_pcihost_reset);
1395 dc->realize = s390_pcihost_realize;
1396 dc->unrealize = s390_pcihost_unrealize;
1397 hc->pre_plug = s390_pcihost_pre_plug;
1398 hc->plug = s390_pcihost_plug;
1399 hc->unplug_request = s390_pcihost_unplug_request;
1400 hc->unplug = s390_pcihost_unplug;
1401 msi_nonbroken = true;
1402 }
1403
1404 static const TypeInfo s390_pcihost_info = {
1405 .name = TYPE_S390_PCI_HOST_BRIDGE,
1406 .parent = TYPE_PCI_HOST_BRIDGE,
1407 .instance_size = sizeof(S390pciState),
1408 .class_init = s390_pcihost_class_init,
1409 .interfaces = (const InterfaceInfo[]) {
1410 { TYPE_HOTPLUG_HANDLER },
1411 { }
1412 }
1413 };
1414
1415 static const TypeInfo s390_pcibus_info = {
1416 .name = TYPE_S390_PCI_BUS,
1417 .parent = TYPE_BUS,
1418 .instance_size = sizeof(S390PCIBus),
1419 };
1420
1421 static uint16_t s390_pci_generate_uid(S390pciState *s)
1422 {
1423 uint16_t uid = 0;
1424
1425 do {
1426 uid++;
1427 if (!s390_pci_find_dev_by_uid(s, uid)) {
1428 return uid;
1429 }
1430 } while (uid < ZPCI_MAX_UID);
1431
1432 return UID_UNDEFINED;
1433 }
1434
1435 static uint32_t s390_pci_generate_fid(S390pciState *s, Error **errp)
1436 {
1437 uint32_t fid = 0;
1438
1439 do {
1440 if (!s390_pci_find_dev_by_fid(s, fid)) {
1441 return fid;
1442 }
1443 } while (fid++ != ZPCI_MAX_FID);
1444
1445 error_setg(errp, "no free fid could be found");
1446 return 0;
1447 }
1448
1449 static void s390_pci_device_realize(DeviceState *dev, Error **errp)
1450 {
1451 S390PCIBusDevice *zpci = S390_PCI_DEVICE(dev);
1452 S390pciState *s = s390_get_phb();
1453
1454 if (!zpci->target) {
1455 error_setg(errp, "target must be defined");
1456 return;
1457 }
1458
1459 if (s390_pci_find_dev_by_target(s, zpci->target)) {
1460 error_setg(errp, "target %s already has an associated zpci device",
1461 zpci->target);
1462 return;
1463 }
1464
1465 if (zpci->uid == UID_UNDEFINED) {
1466 zpci->uid = s390_pci_generate_uid(s);
1467 if (!zpci->uid) {
1468 error_setg(errp, "no free uid could be found");
1469 return;
1470 }
1471 } else if (s390_pci_find_dev_by_uid(s, zpci->uid)) {
1472 error_setg(errp, "uid %u already in use", zpci->uid);
1473 return;
1474 }
1475
1476 if (!zpci->fid_defined) {
1477 Error *local_error = NULL;
1478
1479 zpci->fid = s390_pci_generate_fid(s, &local_error);
1480 if (local_error) {
1481 error_propagate(errp, local_error);
1482 return;
1483 }
1484 } else if (s390_pci_find_dev_by_fid(s, zpci->fid)) {
1485 error_setg(errp, "fid %u already in use", zpci->fid);
1486 return;
1487 }
1488
1489 zpci->state = ZPCI_FS_RESERVED;
1490 zpci->fmb.format = ZPCI_FMB_FORMAT;
1491 }
1492
1493 static void s390_pci_device_reset(DeviceState *dev)
1494 {
1495 S390PCIBusDevice *pbdev = S390_PCI_DEVICE(dev);
1496
1497 switch (pbdev->state) {
1498 case ZPCI_FS_RESERVED:
1499 return;
1500 case ZPCI_FS_STANDBY:
1501 break;
1502 default:
1503 pbdev->fh &= ~FH_MASK_ENABLE;
1504 pbdev->state = ZPCI_FS_DISABLED;
1505 break;
1506 }
1507
1508 if (pbdev->interp) {
1509 /* Interpreted devices were using interrupt forwarding */
1510 s390_pci_kvm_aif_disable(pbdev);
1511 } else if (pbdev->summary_ind) {
1512 pci_dereg_irqs(pbdev);
1513 }
1514 if (pbdev->iommu->enabled) {
1515 pci_dereg_ioat(pbdev->iommu);
1516 }
1517
1518 fmb_timer_free(pbdev);
1519 }
1520
1521 static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
1522 void *opaque, Error **errp)
1523 {
1524 const Property *prop = opaque;
1525 uint32_t *ptr = object_field_prop_ptr(obj, prop);
1526
1527 visit_type_uint32(v, name, ptr, errp);
1528 }
1529
1530 static void s390_pci_set_fid(Object *obj, Visitor *v, const char *name,
1531 void *opaque, Error **errp)
1532 {
1533 S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
1534 const Property *prop = opaque;
1535 uint32_t *ptr = object_field_prop_ptr(obj, prop);
1536
1537 if (!visit_type_uint32(v, name, ptr, errp)) {
1538 return;
1539 }
1540 zpci->fid_defined = true;
1541 }
1542
1543 static const PropertyInfo s390_pci_fid_propinfo = {
1544 .type = "uint32",
1545 .description = "zpci_fid",
1546 .get = s390_pci_get_fid,
1547 .set = s390_pci_set_fid,
1548 };
1549
1550 #define DEFINE_PROP_S390_PCI_FID(_n, _s, _f) \
1551 DEFINE_PROP(_n, _s, _f, s390_pci_fid_propinfo, uint32_t)
1552
1553 static const Property s390_pci_device_properties[] = {
1554 DEFINE_PROP_UINT16("uid", S390PCIBusDevice, uid, UID_UNDEFINED),
1555 DEFINE_PROP_S390_PCI_FID("fid", S390PCIBusDevice, fid),
1556 DEFINE_PROP_STRING("target", S390PCIBusDevice, target),
1557 DEFINE_PROP_BOOL("interpret", S390PCIBusDevice, interp, true),
1558 DEFINE_PROP_BOOL("forwarding-assist", S390PCIBusDevice, forwarding_assist,
1559 true),
1560 DEFINE_PROP_BOOL("relaxed-translation", S390PCIBusDevice, rtr_avail,
1561 true),
1562 };
1563
1564 static const VMStateDescription s390_pci_device_vmstate = {
1565 .name = TYPE_S390_PCI_DEVICE,
1566 /*
1567 * TODO: add state handling here, so migration works at least with
1568 * emulated pci devices on s390x
1569 */
1570 .unmigratable = 1,
1571 };
1572
1573 static void s390_pci_device_class_init(ObjectClass *klass, const void *data)
1574 {
1575 DeviceClass *dc = DEVICE_CLASS(klass);
1576
1577 dc->desc = "zpci device";
1578 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
1579 device_class_set_legacy_reset(dc, s390_pci_device_reset);
1580 dc->bus_type = TYPE_S390_PCI_BUS;
1581 dc->realize = s390_pci_device_realize;
1582 device_class_set_props(dc, s390_pci_device_properties);
1583 dc->vmsd = &s390_pci_device_vmstate;
1584 }
1585
1586 static const TypeInfo s390_pci_device_info = {
1587 .name = TYPE_S390_PCI_DEVICE,
1588 .parent = TYPE_DEVICE,
1589 .instance_size = sizeof(S390PCIBusDevice),
1590 .class_init = s390_pci_device_class_init,
1591 };
1592
1593 static const TypeInfo s390_pci_iommu_info = {
1594 .name = TYPE_S390_PCI_IOMMU,
1595 .parent = TYPE_OBJECT,
1596 .instance_size = sizeof(S390PCIIOMMU),
1597 };
1598
1599 static void s390_iommu_memory_region_class_init(ObjectClass *klass,
1600 const void *data)
1601 {
1602 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_CLASS(klass);
1603
1604 imrc->translate = s390_translate_iommu;
1605 imrc->replay = s390_pci_iommu_replay;
1606 }
1607
1608 static const TypeInfo s390_iommu_memory_region_info = {
1609 .parent = TYPE_IOMMU_MEMORY_REGION,
1610 .name = TYPE_S390_IOMMU_MEMORY_REGION,
1611 .class_init = s390_iommu_memory_region_class_init,
1612 };
1613
1614 static void s390_pci_register_types(void)
1615 {
1616 type_register_static(&s390_pcihost_info);
1617 type_register_static(&s390_pcibus_info);
1618 type_register_static(&s390_pci_device_info);
1619 type_register_static(&s390_pci_iommu_info);
1620 type_register_static(&s390_iommu_memory_region_info);
1621 }
1622
1623 type_init(s390_pci_register_types)