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1 /*
2 * LASI Wrapper for NCR710 SCSI Controller
3 *
4 * Copyright (c) 2025 Soumyajyotii Ssarkar <soumyajyotisarkar23@gmail.com>
5 * This driver was developed during the Google Summer of Code 2025 program.
6 * Mentored by Helge Deller <deller@gmx.de>
7 *
8 * NCR710 SCSI Controller implementation
9 * Based on the NCR53C710 Technical Manual Version 3.2, December 2000
10 *
11 * SPDX-License-Identifier: GPL-2.0-or-later
12 */
13
14 #ifndef HW_LASI_NCR710_H
15 #define HW_LASI_NCR710_H
16
17 #include "hw/core/sysbus.h"
18 #include "exec/memattrs.h"
19 #include "hw/scsi/scsi.h"
20 #include "hw/scsi/ncr53c710.h"
21
22 #define TYPE_LASI_NCR710 "lasi-ncr710"
23 OBJECT_DECLARE_SIMPLE_TYPE(LasiNCR710State, LASI_NCR710)
24
25 #define LASI_SCSI_RESET 0x000 /* SCSI Reset Register */
26 #define LASI_SCSI_NCR710_BASE 0x100 /* NCR710 Base Register Offset */
27
28 #define PARISC_DEVICE_ID_OFF 0x00 /* HW type, HVERSION, SVERSION */
29 #define PARISC_DEVICE_CONFIG_OFF 0x04 /* Configuration data */
30
31 #define PHASE_MASK 7
32 #define PHASE_DO 0
33
34 #define NCR710_SCNTL1_RST 0x08 /* SCSI Reset */
35 #define NCR710_ISTAT_RST 0x40 /* Device Reset */
36 #define NCR710_ISTAT_ABRT 0x80 /* Script Abort */
37 #define NCR710_ISTAT_CON 0x08 /* ISTAT_Connected */
38 #define NCR710_DSTAT_DFE 0x80 /* DMA FIFO Empty */
39 #define NCR710_CTEST2_DACK 0x01 /* DMA Acknowledge */
40
41 typedef struct LasiNCR710State {
42 SysBusDevice parent_obj;
43 MemoryRegion mmio;
44 qemu_irq lasi_irq; /* IRQ line to LASI controller */
45 uint32_t hw_type; /* Hardware type (HPHW_*) */
46 uint32_t sversion; /* Software version */
47 uint32_t hversion; /* Hardware version */
48 NCR710State ncr710;
49 } LasiNCR710State;
50
51 DeviceState *lasi_ncr710_init(MemoryRegion *addr_space, hwaddr hpa,
52 qemu_irq irq);
53 void lasi_ncr710_handle_legacy_cmdline(DeviceState *lasi_dev);
54
55 #endif