| 1 | /* |
| 2 | * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. |
| 3 | * All rights reserved. |
| 4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions are met: |
| 7 | * * Redistributions of source code must retain the above copyright |
| 8 | * notice, this list of conditions and the following disclaimer. |
| 9 | * * Redistributions in binary form must reproduce the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer in the |
| 11 | * documentation and/or other materials provided with the distribution. |
| 12 | * * Neither the name of the Open Source and Linux Lab nor the |
| 13 | * names of its contributors may be used to endorse or promote products |
| 14 | * derived from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY |
| 20 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
| 21 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
| 22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
| 23 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
| 25 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 26 | */ |
| 27 | |
| 28 | #include "qemu/osdep.h" |
| 29 | #include "qapi/error.h" |
| 30 | #include "system/reset.h" |
| 31 | #include "system/system.h" |
| 32 | #include "hw/core/boards.h" |
| 33 | #include "hw/core/loader.h" |
| 34 | #include "elf.h" |
| 35 | #include "system/memory.h" |
| 36 | #include "qemu/error-report.h" |
| 37 | #include "xtensa_memory.h" |
| 38 | #include "xtensa_sim.h" |
| 39 | |
| 40 | static uint64_t translate_phys_addr(void *opaque, uint64_t addr) |
| 41 | { |
| 42 | XtensaCPU *cpu = opaque; |
| 43 | TranslateForDebugResult tres; |
| 44 | |
| 45 | if (!cpu_translate_for_debug(CPU(cpu), addr, &tres)) { |
| 46 | return -1; |
| 47 | } |
| 48 | return tres.physaddr; |
| 49 | } |
| 50 | |
| 51 | static void sim_reset(void *opaque) |
| 52 | { |
| 53 | XtensaCPU *cpu = opaque; |
| 54 | |
| 55 | cpu_reset(CPU(cpu)); |
| 56 | } |
| 57 | |
| 58 | XtensaCPU *xtensa_sim_common_init(MachineState *machine) |
| 59 | { |
| 60 | XtensaCPU *cpu = NULL; |
| 61 | CPUXtensaState *env = NULL; |
| 62 | ram_addr_t ram_size = machine->ram_size; |
| 63 | int n; |
| 64 | |
| 65 | for (n = 0; n < machine->smp.cpus; n++) { |
| 66 | cpu = XTENSA_CPU(cpu_create(machine->cpu_type)); |
| 67 | env = &cpu->env; |
| 68 | |
| 69 | env->sregs[PRID] = n; |
| 70 | qemu_register_reset(sim_reset, cpu); |
| 71 | /* Need MMU initialized prior to ELF loading, |
| 72 | * so that ELF gets loaded into virtual addresses |
| 73 | */ |
| 74 | sim_reset(cpu); |
| 75 | } |
| 76 | |
| 77 | if (env) { |
| 78 | XtensaMemory sysram = env->config->sysram; |
| 79 | |
| 80 | sysram.location[0].size = ram_size; |
| 81 | xtensa_create_memory_regions(&env->config->instrom, "xtensa.instrom", |
| 82 | get_system_memory()); |
| 83 | xtensa_create_memory_regions(&env->config->instram, "xtensa.instram", |
| 84 | get_system_memory()); |
| 85 | xtensa_create_memory_regions(&env->config->datarom, "xtensa.datarom", |
| 86 | get_system_memory()); |
| 87 | xtensa_create_memory_regions(&env->config->dataram, "xtensa.dataram", |
| 88 | get_system_memory()); |
| 89 | xtensa_create_memory_regions(&env->config->sysrom, "xtensa.sysrom", |
| 90 | get_system_memory()); |
| 91 | xtensa_create_memory_regions(&sysram, "xtensa.sysram", |
| 92 | get_system_memory()); |
| 93 | } |
| 94 | if (serial_hd(0)) { |
| 95 | xtensa_sim_open_console(serial_hd(0)); |
| 96 | } |
| 97 | return cpu; |
| 98 | } |
| 99 | |
| 100 | void xtensa_sim_load_kernel(XtensaCPU *cpu, MachineState *machine) |
| 101 | { |
| 102 | const char *kernel_filename = machine->kernel_filename; |
| 103 | |
| 104 | if (kernel_filename) { |
| 105 | uint64_t elf_entry; |
| 106 | int success = load_elf(kernel_filename, NULL, translate_phys_addr, cpu, |
| 107 | &elf_entry, NULL, NULL, NULL, |
| 108 | TARGET_BIG_ENDIAN ? ELFDATA2MSB : ELFDATA2LSB, |
| 109 | EM_XTENSA, 0, 0); |
| 110 | |
| 111 | if (success > 0) { |
| 112 | cpu->env.pc = elf_entry; |
| 113 | } |
| 114 | } |
| 115 | } |
| 116 | |
| 117 | static void xtensa_sim_init(MachineState *machine) |
| 118 | { |
| 119 | XtensaCPU *cpu = xtensa_sim_common_init(machine); |
| 120 | |
| 121 | xtensa_sim_load_kernel(cpu, machine); |
| 122 | } |
| 123 | |
| 124 | static void xtensa_sim_machine_init(MachineClass *mc) |
| 125 | { |
| 126 | mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")"; |
| 127 | mc->is_default = true; |
| 128 | mc->init = xtensa_sim_init; |
| 129 | mc->max_cpus = 4; |
| 130 | mc->no_serial = 1; |
| 131 | mc->default_cpu_type = XTENSA_DEFAULT_CPU_TYPE; |
| 132 | } |
| 133 | |
| 134 | DEFINE_MACHINE("sim", xtensa_sim_machine_init) |