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1 /*
2 * Software MMU support
3 *
4 * SPDX-License-Identifier: LGPL-2.1-or-later
5 */
6
7 #ifndef ACCEL_TCG_CPU_LDST_COMMON_H
8 #define ACCEL_TCG_CPU_LDST_COMMON_H
9
10 #ifndef CONFIG_TCG
11 #error Can only include this header with TCG
12 #endif
13
14 #include "exec/memopidx.h"
15 #include "exec/vaddr.h"
16 #include "exec/mmu-access-type.h"
17 #include "qemu/int128.h"
18
19 uint8_t cpu_ldb_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
20 uint16_t cpu_ldw_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
21 uint32_t cpu_ldl_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
22 uint64_t cpu_ldq_mmu(CPUArchState *env, vaddr ptr, MemOpIdx oi, uintptr_t ra);
23 Int128 cpu_ld16_mmu(CPUArchState *env, vaddr addr, MemOpIdx oi, uintptr_t ra);
24
25 void cpu_stb_mmu(CPUArchState *env, vaddr ptr, uint8_t val,
26 MemOpIdx oi, uintptr_t ra);
27 void cpu_stw_mmu(CPUArchState *env, vaddr ptr, uint16_t val,
28 MemOpIdx oi, uintptr_t ra);
29 void cpu_stl_mmu(CPUArchState *env, vaddr ptr, uint32_t val,
30 MemOpIdx oi, uintptr_t ra);
31 void cpu_stq_mmu(CPUArchState *env, vaddr ptr, uint64_t val,
32 MemOpIdx oi, uintptr_t ra);
33 void cpu_st16_mmu(CPUArchState *env, vaddr addr, Int128 val,
34 MemOpIdx oi, uintptr_t ra);
35
36 uint32_t cpu_atomic_cmpxchgb_mmu(CPUArchState *env, vaddr addr,
37 uint32_t cmpv, uint32_t newv,
38 MemOpIdx oi, uintptr_t retaddr);
39 uint32_t cpu_atomic_cmpxchgw_le_mmu(CPUArchState *env, vaddr addr,
40 uint32_t cmpv, uint32_t newv,
41 MemOpIdx oi, uintptr_t retaddr);
42 uint32_t cpu_atomic_cmpxchgl_le_mmu(CPUArchState *env, vaddr addr,
43 uint32_t cmpv, uint32_t newv,
44 MemOpIdx oi, uintptr_t retaddr);
45 uint64_t cpu_atomic_cmpxchgq_le_mmu(CPUArchState *env, vaddr addr,
46 uint64_t cmpv, uint64_t newv,
47 MemOpIdx oi, uintptr_t retaddr);
48 uint32_t cpu_atomic_cmpxchgw_be_mmu(CPUArchState *env, vaddr addr,
49 uint32_t cmpv, uint32_t newv,
50 MemOpIdx oi, uintptr_t retaddr);
51 uint32_t cpu_atomic_cmpxchgl_be_mmu(CPUArchState *env, vaddr addr,
52 uint32_t cmpv, uint32_t newv,
53 MemOpIdx oi, uintptr_t retaddr);
54 uint64_t cpu_atomic_cmpxchgq_be_mmu(CPUArchState *env, vaddr addr,
55 uint64_t cmpv, uint64_t newv,
56 MemOpIdx oi, uintptr_t retaddr);
57
58 #define GEN_ATOMIC_HELPER(NAME, TYPE, SUFFIX) \
59 TYPE cpu_atomic_ ## NAME ## SUFFIX ## _mmu \
60 (CPUArchState *env, vaddr addr, TYPE val, \
61 MemOpIdx oi, uintptr_t retaddr);
62
63 #define GEN_ATOMIC_HELPER_ALL(NAME) \
64 GEN_ATOMIC_HELPER(NAME, uint32_t, b) \
65 GEN_ATOMIC_HELPER(NAME, uint32_t, w_le) \
66 GEN_ATOMIC_HELPER(NAME, uint32_t, w_be) \
67 GEN_ATOMIC_HELPER(NAME, uint32_t, l_le) \
68 GEN_ATOMIC_HELPER(NAME, uint32_t, l_be) \
69 GEN_ATOMIC_HELPER(NAME, uint64_t, q_le) \
70 GEN_ATOMIC_HELPER(NAME, uint64_t, q_be)
71
72 GEN_ATOMIC_HELPER_ALL(fetch_add)
73 GEN_ATOMIC_HELPER_ALL(fetch_sub)
74 GEN_ATOMIC_HELPER_ALL(fetch_and)
75 GEN_ATOMIC_HELPER_ALL(fetch_or)
76 GEN_ATOMIC_HELPER_ALL(fetch_xor)
77 GEN_ATOMIC_HELPER_ALL(fetch_smin)
78 GEN_ATOMIC_HELPER_ALL(fetch_umin)
79 GEN_ATOMIC_HELPER_ALL(fetch_smax)
80 GEN_ATOMIC_HELPER_ALL(fetch_umax)
81
82 GEN_ATOMIC_HELPER_ALL(add_fetch)
83 GEN_ATOMIC_HELPER_ALL(sub_fetch)
84 GEN_ATOMIC_HELPER_ALL(and_fetch)
85 GEN_ATOMIC_HELPER_ALL(or_fetch)
86 GEN_ATOMIC_HELPER_ALL(xor_fetch)
87 GEN_ATOMIC_HELPER_ALL(smin_fetch)
88 GEN_ATOMIC_HELPER_ALL(umin_fetch)
89 GEN_ATOMIC_HELPER_ALL(smax_fetch)
90 GEN_ATOMIC_HELPER_ALL(umax_fetch)
91
92 GEN_ATOMIC_HELPER_ALL(xchg)
93
94 Int128 cpu_atomic_cmpxchgo_le_mmu(CPUArchState *env, vaddr addr,
95 Int128 cmpv, Int128 newv,
96 MemOpIdx oi, uintptr_t retaddr);
97 Int128 cpu_atomic_cmpxchgo_be_mmu(CPUArchState *env, vaddr addr,
98 Int128 cmpv, Int128 newv,
99 MemOpIdx oi, uintptr_t retaddr);
100
101 GEN_ATOMIC_HELPER(xchg, Int128, o_le)
102 GEN_ATOMIC_HELPER(xchg, Int128, o_be)
103 GEN_ATOMIC_HELPER(fetch_and, Int128, o_le)
104 GEN_ATOMIC_HELPER(fetch_and, Int128, o_be)
105 GEN_ATOMIC_HELPER(fetch_or, Int128, o_le)
106 GEN_ATOMIC_HELPER(fetch_or, Int128, o_be)
107
108 #undef GEN_ATOMIC_HELPER_ALL
109 #undef GEN_ATOMIC_HELPER
110
111 uint8_t cpu_ldb_code_mmu(CPUArchState *env, vaddr addr,
112 MemOpIdx oi, uintptr_t ra);
113 uint16_t cpu_ldw_code_mmu(CPUArchState *env, vaddr addr,
114 MemOpIdx oi, uintptr_t ra);
115 uint32_t cpu_ldl_code_mmu(CPUArchState *env, vaddr addr,
116 MemOpIdx oi, uintptr_t ra);
117 uint64_t cpu_ldq_code_mmu(CPUArchState *env, vaddr addr,
118 MemOpIdx oi, uintptr_t ra);
119
120 #endif /* ACCEL_TCG_CPU_LDST_COMMON_H */