| 1 | #ifndef QEMU_CAPSTONE_H |
| 2 | #define QEMU_CAPSTONE_H |
| 3 | |
| 4 | #ifdef CONFIG_CAPSTONE |
| 5 | |
| 6 | #define CAPSTONE_AARCH64_COMPAT_HEADER |
| 7 | #include <capstone.h> |
| 8 | |
| 9 | #else |
| 10 | |
| 11 | /* Just enough to allow backends to init without ifdefs. */ |
| 12 | |
| 13 | #define CS_API_MAJOR 0 |
| 14 | |
| 15 | #define CS_ARCH_ARM -1 |
| 16 | #define CS_ARCH_ARM64 -1 |
| 17 | #define CS_ARCH_M68K -1 |
| 18 | #define CS_ARCH_MIPS -1 |
| 19 | #define CS_ARCH_X86 -1 |
| 20 | #define CS_ARCH_PPC -1 |
| 21 | #define CS_ARCH_SPARC -1 |
| 22 | |
| 23 | #define CS_MODE_LITTLE_ENDIAN 0 |
| 24 | #define CS_MODE_BIG_ENDIAN 0 |
| 25 | #define CS_MODE_ARM 0 |
| 26 | #define CS_MODE_16 0 |
| 27 | #define CS_MODE_32 0 |
| 28 | #define CS_MODE_64 0 |
| 29 | #define CS_MODE_THUMB 0 |
| 30 | #define CS_MODE_MCLASS 0 |
| 31 | #define CS_MODE_V8 0 |
| 32 | #define CS_MODE_V9 0 |
| 33 | #define CS_MODE_M68K_000 0 |
| 34 | #define CS_MODE_M68K_010 0 |
| 35 | #define CS_MODE_M68K_020 0 |
| 36 | #define CS_MODE_M68K_030 0 |
| 37 | #define CS_MODE_M68K_040 0 |
| 38 | #define CS_MODE_M68K_060 0 |
| 39 | #define CS_MODE_MICRO 0 |
| 40 | #define CS_MODE_MIPS2 0 |
| 41 | #define CS_MODE_MIPS3 0 |
| 42 | #define CS_MODE_MIPS32 0 |
| 43 | #define CS_MODE_MIPS32R6 0 |
| 44 | #define CS_MODE_MIPS64 0 |
| 45 | |
| 46 | #endif /* CONFIG_CAPSTONE */ |
| 47 | |
| 48 | #if CS_API_MAJOR < 6 |
| 49 | #define CS_ARCH_LOONGARCH -1 |
| 50 | #define CS_MODE_LOONGARCH32 0 |
| 51 | #define CS_MODE_LOONGARCH64 0 |
| 52 | #endif |
| 53 | |
| 54 | #if CS_API_MAJOR < 6 |
| 55 | #define CS_MODE_M68K_CF_ISA_A 0 |
| 56 | #define CS_MODE_M68K_CF_ISA_A_PLUS 0 |
| 57 | #define CS_MODE_M68K_CF_ISA_B 0 |
| 58 | #define CS_MODE_M68K_CF_ISA_C 0 |
| 59 | #define CS_MODE_M68K_CF_USP 0 |
| 60 | #define CS_MODE_M68K_CF_DIV 0 |
| 61 | #define CS_MODE_M68K_CF_MAC 0 |
| 62 | #define CS_MODE_M68K_CF_EMAC 0 |
| 63 | #define CS_MODE_M68K_CF_EMAC_B 0 |
| 64 | #define CS_MODE_M68K_CF_FPU 0 |
| 65 | #endif |
| 66 | |
| 67 | #if CS_API_MAJOR < 6 |
| 68 | #define CS_MODE_MIPS16 0 |
| 69 | #define CS_MODE_MIPS1 0 |
| 70 | #define CS_MODE_MIPS32R2 0 |
| 71 | #define CS_MODE_MIPS32R3 0 |
| 72 | #define CS_MODE_MIPS32R5 0 |
| 73 | #define CS_MODE_MIPS4 0 |
| 74 | #define CS_MODE_MIPS5 0 |
| 75 | #define CS_MODE_MIPS64R2 0 |
| 76 | #define CS_MODE_MIPS64R3 0 |
| 77 | #define CS_MODE_MIPS64R5 0 |
| 78 | #define CS_MODE_MIPS64R6 0 |
| 79 | #define CS_MODE_OCTEON 0 |
| 80 | #define CS_MODE_OCTEONP 0 |
| 81 | #define CS_MODE_NANOMIPS 0 |
| 82 | #define CS_MODE_MIPS_PTR64 0 |
| 83 | #endif |
| 84 | |
| 85 | #if CS_API_MAJOR < 5 |
| 86 | #define CS_ARCH_RISCV -1 |
| 87 | #define CS_MODE_RISCV32 0 |
| 88 | #define CS_MODE_RISCV64 0 |
| 89 | #define CS_MODE_RISCV_C 0 |
| 90 | #elif CS_API_MAJOR == 5 |
| 91 | /* The C symbol name changed between v5 and v6 */ |
| 92 | #define CS_MODE_RISCV_C CS_MODE_RISCVC |
| 93 | #endif |
| 94 | #if CS_API_MAJOR < 6 |
| 95 | #define CS_MODE_RISCV_FD 0 |
| 96 | #define CS_MODE_RISCV_V 0 |
| 97 | #define CS_MODE_RISCV_ZFINX 0 |
| 98 | #define CS_MODE_RISCV_ZCMP_ZCMT_ZCE 0 |
| 99 | #define CS_MODE_RISCV_ZICFISS 0 |
| 100 | #define CS_MODE_RISCV_E 0 |
| 101 | #define CS_MODE_RISCV_A 0 |
| 102 | #define CS_MODE_RISCV_COREV 0 |
| 103 | #define CS_MODE_RISCV_THEAD 0 |
| 104 | #define CS_MODE_RISCV_SIFIVE 0 |
| 105 | #define CS_MODE_RISCV_BITMANIP 0 |
| 106 | #define CS_MODE_RISCV_ZBA 0 |
| 107 | #define CS_MODE_RISCV_ZBB 0 |
| 108 | #define CS_MODE_RISCV_ZBC 0 |
| 109 | #define CS_MODE_RISCV_ZBKB 0 |
| 110 | #define CS_MODE_RISCV_ZBKC 0 |
| 111 | #define CS_MODE_RISCV_ZBKX 0 |
| 112 | #define CS_MODE_RISCV_ZBS 0 |
| 113 | #define CS_MODE_RISCV_VENTANA 0 |
| 114 | #endif |
| 115 | |
| 116 | #if CS_API_MAJOR < 5 |
| 117 | #define CS_ARCH_SH -1 |
| 118 | #define CS_MODE_SHFPU 0 |
| 119 | #define CS_MODE_SH4 0 |
| 120 | #define CS_MODE_SH4A 0 |
| 121 | #endif |
| 122 | |
| 123 | #if CS_API_MAJOR == 0 |
| 124 | #define CS_ARCH_SYSTEMZ -1 |
| 125 | #elif CS_API_MAJOR < 6 |
| 126 | #define CS_ARCH_SYSTEMZ CS_ARCH_SYSZ |
| 127 | #endif |
| 128 | #if CS_API_MAJOR < 6 |
| 129 | #define CS_MODE_SYSTEMZ_ARCH14 0 |
| 130 | #endif |
| 131 | |
| 132 | #if CS_API_MAJOR < 5 |
| 133 | #define CS_ARCH_TRICORE -1 |
| 134 | #define CS_MODE_TRICORE_110 0 |
| 135 | #define CS_MODE_TRICORE_120 0 |
| 136 | #define CS_MODE_TRICORE_130 0 |
| 137 | #define CS_MODE_TRICORE_131 0 |
| 138 | #define CS_MODE_TRICORE_160 0 |
| 139 | #define CS_MODE_TRICORE_161 0 |
| 140 | #define CS_MODE_TRICORE_162 0 |
| 141 | #endif |
| 142 | |
| 143 | #endif /* QEMU_CAPSTONE_H */ |