| 1 | /* |
| 2 | * CPU interfaces that are target independent. |
| 3 | * |
| 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * SPDX-License-Identifier: LGPL-2.1+ |
| 7 | */ |
| 8 | #ifndef CPU_COMMON_H |
| 9 | #define CPU_COMMON_H |
| 10 | |
| 11 | #include "qemu/thread.h" |
| 12 | #include "hw/core/cpu.h" |
| 13 | |
| 14 | #define EXCP_INTERRUPT 0x10000 /* async interruption */ |
| 15 | #define EXCP_HLT 0x10001 /* hlt instruction reached */ |
| 16 | #define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */ |
| 17 | #define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */ |
| 18 | #define EXCP_YIELD 0x10004 /* cpu wants to yield timeslice to another */ |
| 19 | #define EXCP_ATOMIC 0x10005 /* stop-the-world and emulate atomic */ |
| 20 | |
| 21 | #define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size()) |
| 22 | |
| 23 | /* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */ |
| 24 | extern QemuMutex qemu_cpu_list_lock; |
| 25 | void qemu_init_cpu_list(void); |
| 26 | void cpu_list_lock(void); |
| 27 | void cpu_list_unlock(void); |
| 28 | unsigned int cpu_list_generation_id_get(void); |
| 29 | |
| 30 | int cpu_get_free_index(void); |
| 31 | |
| 32 | /** |
| 33 | * cpu_address_space_init: |
| 34 | * @cpu: CPU to add this address space to |
| 35 | * @asidx: integer index of this address space |
| 36 | * @prefix: prefix to be used as name of address space |
| 37 | * @mr: the root memory region of address space |
| 38 | * |
| 39 | * Add the specified address space to the CPU's cpu_ases list. |
| 40 | * The address space added with @asidx 0 is the one used for the |
| 41 | * convenience pointer cpu->as. |
| 42 | * The target-specific code which registers ASes is responsible |
| 43 | * for defining what semantics address space 0, 1, 2, etc have. |
| 44 | * |
| 45 | * Note that with KVM only one address space is supported. |
| 46 | */ |
| 47 | void cpu_address_space_init(CPUState *cpu, int asidx, |
| 48 | const char *prefix, MemoryRegion *mr); |
| 49 | /** |
| 50 | * cpu_destroy_address_spaces: |
| 51 | * @cpu: CPU for which address spaces need to be destroyed |
| 52 | * |
| 53 | * Destroy all address spaces associated with this CPU; this |
| 54 | * is called as part of unrealizing the CPU. |
| 55 | */ |
| 56 | void cpu_destroy_address_spaces(CPUState *cpu); |
| 57 | |
| 58 | /* vl.c */ |
| 59 | void list_cpus(void); |
| 60 | |
| 61 | #ifdef CONFIG_TCG |
| 62 | #include "qemu/atomic.h" |
| 63 | |
| 64 | /** |
| 65 | * cpu_loop_exit_requested: |
| 66 | * @cpu: The CPU state to be tested |
| 67 | * |
| 68 | * Indicate if somebody asked for a return of the CPU to the main loop |
| 69 | * (e.g., via cpu_exit() or cpu_interrupt()). |
| 70 | * |
| 71 | * This is helpful for architectures that support interruptible |
| 72 | * instructions. After writing back all state to registers/memory, this |
| 73 | * call can be used to check if it makes sense to return to the main loop |
| 74 | * or to continue executing the interruptible instruction. |
| 75 | */ |
| 76 | static inline bool cpu_loop_exit_requested(const CPUState *cpu) |
| 77 | { |
| 78 | return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; |
| 79 | } |
| 80 | #endif /* CONFIG_TCG */ |
| 81 | |
| 82 | /** |
| 83 | * env_archcpu(env) |
| 84 | * @env: The architecture environment |
| 85 | * |
| 86 | * Return the ArchCPU associated with the environment. |
| 87 | */ |
| 88 | static inline ArchCPU *env_archcpu(CPUArchState *env) |
| 89 | { |
| 90 | return (void *)env - sizeof(CPUState); |
| 91 | } |
| 92 | |
| 93 | /** |
| 94 | * env_cpu_const(env) |
| 95 | * @env: The architecture environment |
| 96 | * |
| 97 | * Return the CPUState associated with the environment. |
| 98 | */ |
| 99 | static inline const CPUState *env_cpu_const(const CPUArchState *env) |
| 100 | { |
| 101 | return (void *)env - sizeof(CPUState); |
| 102 | } |
| 103 | |
| 104 | /** |
| 105 | * env_cpu(env) |
| 106 | * @env: The architecture environment |
| 107 | * |
| 108 | * Return the CPUState associated with the environment. |
| 109 | */ |
| 110 | static inline CPUState *env_cpu(CPUArchState *env) |
| 111 | { |
| 112 | return (CPUState *)env_cpu_const(env); |
| 113 | } |
| 114 | |
| 115 | #endif /* CPU_COMMON_H */ |