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1 /*
2 * BCM2838 peripherals emulation
3 *
4 * Copyright (C) 2022 Ovchinnikov Vitalii <vitalii.ovchinnikov@auriga.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8
9 #ifndef BCM2838_PERIPHERALS_H
10 #define BCM2838_PERIPHERALS_H
11
12 #include "hw/arm/bcm2835_peripherals.h"
13 #include "hw/sd/sdhci.h"
14 #include "hw/gpio/bcm2838_gpio.h"
15
16 /* SPI */
17 #define GIC_SPI_INTERRUPT_MBOX 33
18 #define GIC_SPI_INTERRUPT_MPHI 40
19 #define GIC_SPI_INTERRUPT_DWC2 73
20 #define GIC_SPI_INTERRUPT_DMA_0 80
21 #define GIC_SPI_INTERRUPT_DMA_6 86
22 #define GIC_SPI_INTERRUPT_DMA_7_8 87
23 #define GIC_SPI_INTERRUPT_DMA_9_10 88
24 #define GIC_SPI_INTERRUPT_AUX_UART1 93
25 #define GIC_SPI_INTERRUPT_I2C 117
26 #define GIC_SPI_INTERRUPT_SDHOST 120
27 #define GIC_SPI_INTERRUPT_UART0 121
28 #define GIC_SPI_INTERRUPT_RNG200 125
29 #define GIC_SPI_INTERRUPT_EMMC_EMMC2 126
30 #define GIC_SPI_INTERRUPT_PCI_INT_A 143
31 #define GIC_SPI_INTERRUPT_GENET_A 157
32 #define GIC_SPI_INTERRUPT_GENET_B 158
33
34
35 /* GPU (legacy) DMA interrupts */
36 #define GPU_INTERRUPT_DMA0 16
37 #define GPU_INTERRUPT_DMA1 17
38 #define GPU_INTERRUPT_DMA2 18
39 #define GPU_INTERRUPT_DMA3 19
40 #define GPU_INTERRUPT_DMA4 20
41 #define GPU_INTERRUPT_DMA5 21
42 #define GPU_INTERRUPT_DMA6 22
43 #define GPU_INTERRUPT_DMA7_8 23
44 #define GPU_INTERRUPT_DMA9_10 24
45 #define GPU_INTERRUPT_DMA11 25
46 #define GPU_INTERRUPT_DMA12 26
47 #define GPU_INTERRUPT_DMA13 27
48 #define GPU_INTERRUPT_DMA14 28
49 #define GPU_INTERRUPT_DMA15 31
50
51 #define BCM2838_MPHI_OFFSET 0xb200
52 #define BCM2838_MPHI_SIZE 0x200
53
54 #define TYPE_BCM2838_PERIPHERALS "bcm2838-peripherals"
55 OBJECT_DECLARE_TYPE(BCM2838PeripheralState, BCM2838PeripheralClass,
56 BCM2838_PERIPHERALS)
57
58 struct BCM2838PeripheralState {
59 /*< private >*/
60 BCMSocPeripheralBaseState parent_obj;
61
62 /*< public >*/
63 MemoryRegion peri_low_mr;
64 MemoryRegion peri_low_mr_alias;
65 MemoryRegion mphi_mr_alias;
66
67 SDHCIState emmc2;
68 BCM2838GpioState gpio;
69
70 OrIRQState mmc_irq_orgate;
71 OrIRQState dma_7_8_irq_orgate;
72 OrIRQState dma_9_10_irq_orgate;
73
74 UnimplementedDeviceState asb;
75 UnimplementedDeviceState clkisp;
76 };
77
78 struct BCM2838PeripheralClass {
79 /*< private >*/
80 BCMSocPeripheralBaseClass parent_class;
81 /*< public >*/
82 uint64_t peri_low_size; /* Peripheral lower range size */
83 };
84
85 #endif /* BCM2838_PERIPHERALS_H */