| 1 | /* |
| 2 | * ARM kernel loader. |
| 3 | * |
| 4 | * Copyright (c) 2006 CodeSourcery. |
| 5 | * Written by Paul Brook |
| 6 | * |
| 7 | * This code is licensed under the LGPL. |
| 8 | * |
| 9 | */ |
| 10 | |
| 11 | #ifndef HW_ARM_BOOT_H |
| 12 | #define HW_ARM_BOOT_H |
| 13 | |
| 14 | #include "target/arm/cpu-qom.h" |
| 15 | #include "qemu/notify.h" |
| 16 | |
| 17 | typedef enum { |
| 18 | ARM_ENDIANNESS_UNKNOWN = 0, |
| 19 | ARM_ENDIANNESS_LE, |
| 20 | ARM_ENDIANNESS_BE8, |
| 21 | ARM_ENDIANNESS_BE32, |
| 22 | } arm_endianness; |
| 23 | |
| 24 | /** |
| 25 | * armv7m_load_kernel: |
| 26 | * @cpu: CPU |
| 27 | * @kernel_filename: file to load |
| 28 | * @mem_base: base address to load image at (should be where the |
| 29 | * CPU expects to find its vector table on reset) |
| 30 | * @mem_size: mem_size: maximum image size to load |
| 31 | * |
| 32 | * Load the guest image for an ARMv7M system. This must be called by |
| 33 | * any ARMv7M board. (This is necessary to ensure that the CPU resets |
| 34 | * correctly on system reset, as well as for kernel loading.) |
| 35 | */ |
| 36 | void armv7m_load_kernel(ARMCPU *cpu, const char *kernel_filename, |
| 37 | hwaddr mem_base, int mem_size); |
| 38 | |
| 39 | /* arm_boot.c */ |
| 40 | struct arm_boot_info { |
| 41 | uint64_t ram_size; |
| 42 | const char *shim_filename; |
| 43 | const char *kernel_filename; |
| 44 | const char *kernel_cmdline; |
| 45 | const char *initrd_filename; |
| 46 | const char *dtb_filename; |
| 47 | hwaddr loader_start; |
| 48 | hwaddr dtb_start; |
| 49 | hwaddr dtb_limit; |
| 50 | /* If set to True, arm_load_kernel() will not load DTB. |
| 51 | * It allows board to load DTB manually later. |
| 52 | * (default: False) |
| 53 | */ |
| 54 | bool skip_dtb_autoload; |
| 55 | /* multicore boards that use the default secondary core boot functions |
| 56 | * need to put the address of the secondary boot code, the boot reg, |
| 57 | * and the GIC address in the next 3 values, respectively. boards that |
| 58 | * have their own boot functions can use these values as they want. |
| 59 | */ |
| 60 | hwaddr smp_loader_start; |
| 61 | hwaddr smp_bootreg_addr; |
| 62 | hwaddr gic_cpu_if_addr; |
| 63 | int board_id; |
| 64 | /* ARM machines that support the ARM Security Extensions use this field to |
| 65 | * control whether Linux is booted as secure(true) or non-secure(false). |
| 66 | */ |
| 67 | bool secure_boot; |
| 68 | int (*atag_board)(const struct arm_boot_info *info, void *p); |
| 69 | /* multicore boards that use the default secondary core boot functions |
| 70 | * can ignore these two function calls. If the default functions won't |
| 71 | * work, then write_secondary_boot() should write a suitable blob of |
| 72 | * code mimicking the secondary CPU startup process used by the board's |
| 73 | * boot loader/boot ROM code, and secondary_cpu_reset_hook() should |
| 74 | * perform any necessary CPU reset handling and set the PC for the |
| 75 | * secondary CPUs to point at this boot blob. |
| 76 | * |
| 77 | * These hooks won't be called if secondary CPUs are booting via |
| 78 | * emulated PSCI (see psci_conduit below). |
| 79 | */ |
| 80 | void (*write_secondary_boot)(ARMCPU *cpu, |
| 81 | const struct arm_boot_info *info); |
| 82 | void (*secondary_cpu_reset_hook)(ARMCPU *cpu, |
| 83 | const struct arm_boot_info *info); |
| 84 | /* if a board is able to create a dtb without a dtb file then it |
| 85 | * sets get_dtb. This will only be used if no dtb file is provided |
| 86 | * by the user. On success, sets *size to the length of the created |
| 87 | * dtb, and returns a pointer to it. (The caller must free this memory |
| 88 | * with g_free() when it has finished with it.) On failure, returns NULL. |
| 89 | */ |
| 90 | void *(*get_dtb)(const struct arm_boot_info *info, int *size); |
| 91 | /* if a board needs to be able to modify a device tree provided by |
| 92 | * the user it should implement this hook. |
| 93 | */ |
| 94 | void (*modify_dtb)(const struct arm_boot_info *info, void *fdt); |
| 95 | /* |
| 96 | * If a board wants to use the QEMU emulated-firmware PSCI support, |
| 97 | * it should set this to QEMU_PSCI_CONDUIT_HVC or QEMU_PSCI_CONDUIT_SMC |
| 98 | * as appropriate. arm_load_kernel() will set the psci-conduit and |
| 99 | * start-powered-off properties on the CPUs accordingly. |
| 100 | * Note that if the guest image is started at the same exception level |
| 101 | * as the conduit specifies calls should go to (eg guest firmware booted |
| 102 | * to EL3) then PSCI will not be enabled. |
| 103 | */ |
| 104 | int psci_conduit; |
| 105 | /* Used internally by arm_boot.c */ |
| 106 | int is_linux; |
| 107 | hwaddr initrd_start; |
| 108 | hwaddr initrd_size; |
| 109 | hwaddr entry; |
| 110 | |
| 111 | /* Boot firmware has been loaded, typically at address 0, with -bios or |
| 112 | * -pflash. It also implies that fw_cfg_find() will succeed. |
| 113 | */ |
| 114 | bool firmware_loaded; |
| 115 | |
| 116 | /* Address at which board specific loader/setup code exists. If enabled, |
| 117 | * this code-blob will run before anything else. It must return to the |
| 118 | * caller via the link register. There is no stack set up. Enabled by |
| 119 | * defining write_board_setup, which is responsible for loading the blob |
| 120 | * to the specified address. |
| 121 | */ |
| 122 | hwaddr board_setup_addr; |
| 123 | void (*write_board_setup)(ARMCPU *cpu, |
| 124 | const struct arm_boot_info *info); |
| 125 | |
| 126 | /* |
| 127 | * If set, the board specific loader/setup blob will be run from secure |
| 128 | * mode, regardless of secure_boot. The blob becomes responsible for |
| 129 | * changing to non-secure state if implementing a non-secure boot, |
| 130 | * including setting up EL3/Secure registers such as the NSACR as |
| 131 | * required by the Linux booting ABI before the switch to non-secure. |
| 132 | */ |
| 133 | bool secure_board_setup; |
| 134 | |
| 135 | arm_endianness endianness; |
| 136 | |
| 137 | /* CPU having load the kernel and that should be the first to boot. */ |
| 138 | ARMCPU *primary_cpu; |
| 139 | }; |
| 140 | |
| 141 | /** |
| 142 | * arm_load_kernel - Loads memory with everything needed to boot |
| 143 | * |
| 144 | * @cpu: handle to the first CPU object |
| 145 | * @info: handle to the boot info struct |
| 146 | * Registers a machine init done notifier that copies to memory |
| 147 | * everything needed to boot, depending on machine and user options: |
| 148 | * kernel image, boot loaders, initrd, dtb. Also registers the CPU |
| 149 | * reset handler. |
| 150 | * |
| 151 | * In case the machine file supports the platform bus device and its |
| 152 | * dynamically instantiable sysbus devices, this function must be called |
| 153 | * before sysbus-fdt arm_register_platform_bus_fdt_creator. Indeed the |
| 154 | * machine init done notifiers are called in registration reverse order. |
| 155 | */ |
| 156 | void arm_load_kernel(ARMCPU *cpu, MachineState *ms, struct arm_boot_info *info); |
| 157 | |
| 158 | AddressSpace *arm_boot_address_space(ARMCPU *cpu, |
| 159 | const struct arm_boot_info *info); |
| 160 | |
| 161 | /** |
| 162 | * arm_load_dtb() - load a device tree binary image into memory |
| 163 | * @addr: the address to load the image at |
| 164 | * @binfo: struct describing the boot environment |
| 165 | * @addr_limit: upper limit of the available memory area at @addr |
| 166 | * @as: address space to load image to |
| 167 | * @cpu: ARM CPU object |
| 168 | * |
| 169 | * Load a device tree supplied by the machine or by the user with the |
| 170 | * '-dtb' command line option, and put it at offset @addr in target |
| 171 | * memory. |
| 172 | * |
| 173 | * If @addr_limit contains a meaningful value (i.e., it is strictly greater |
| 174 | * than @addr), the device tree is only loaded if its size does not exceed |
| 175 | * the limit. |
| 176 | * |
| 177 | * Returns: the size of the device tree image on success, |
| 178 | * 0 if the image size exceeds the limit, |
| 179 | * -1 on errors. |
| 180 | * |
| 181 | * Note: Must not be called unless have_dtb(binfo) is true. |
| 182 | */ |
| 183 | int arm_load_dtb(hwaddr addr, const struct arm_boot_info *binfo, |
| 184 | hwaddr addr_limit, AddressSpace *as, MachineState *ms, |
| 185 | ARMCPU *cpu); |
| 186 | |
| 187 | /* Write a secure board setup routine with a dummy handler for SMCs */ |
| 188 | void arm_write_secure_board_setup_dummy_smc(ARMCPU *cpu, |
| 189 | const struct arm_boot_info *info, |
| 190 | hwaddr mvbar_addr); |
| 191 | |
| 192 | typedef enum { |
| 193 | FIXUP_NONE = 0, /* do nothing */ |
| 194 | FIXUP_TERMINATOR, /* end of insns */ |
| 195 | FIXUP_BOARDID, /* overwrite with board ID number */ |
| 196 | FIXUP_BOARD_SETUP, /* overwrite with board specific setup code address */ |
| 197 | FIXUP_ARGPTR_LO, /* overwrite with pointer to kernel args */ |
| 198 | FIXUP_ARGPTR_HI, /* overwrite with pointer to kernel args (high half) */ |
| 199 | FIXUP_ENTRYPOINT_LO, /* overwrite with kernel entry point */ |
| 200 | FIXUP_ENTRYPOINT_HI, /* overwrite with kernel entry point (high half) */ |
| 201 | FIXUP_GIC_CPU_IF, /* overwrite with GIC CPU interface address */ |
| 202 | FIXUP_BOOTREG, /* overwrite with boot register address */ |
| 203 | FIXUP_DSB, /* overwrite with correct DSB insn for cpu */ |
| 204 | FIXUP_MAX, |
| 205 | } FixupType; |
| 206 | |
| 207 | typedef struct ARMInsnFixup { |
| 208 | uint32_t insn; |
| 209 | FixupType fixup; |
| 210 | } ARMInsnFixup; |
| 211 | |
| 212 | /** |
| 213 | * arm_write_bootloader - write a bootloader to guest memory |
| 214 | * @name: name of the bootloader blob |
| 215 | * @as: AddressSpace to write the bootloader |
| 216 | * @addr: guest address to write it |
| 217 | * @insns: the blob to be loaded |
| 218 | * @fixupcontext: context to be used for any fixups in @insns |
| 219 | * |
| 220 | * Write a bootloader to guest memory at address @addr in the address |
| 221 | * space @as. @name is the name to use for the resulting ROM blob, so |
| 222 | * it should be unique in the system and reasonably identifiable for debugging. |
| 223 | * |
| 224 | * @insns must be an array of ARMInsnFixup structs, each of which has |
| 225 | * one 32-bit value to be written to the guest memory, and a fixup to be |
| 226 | * applied to the value. FIXUP_NONE (do nothing) is value 0, so effectively |
| 227 | * the fixup is optional when writing a struct initializer. |
| 228 | * The final entry in the array must be { 0, FIXUP_TERMINATOR }. |
| 229 | * |
| 230 | * All other supported fixup types have the semantics "ignore insn |
| 231 | * and instead use the value from the array element @fixupcontext[fixup]". |
| 232 | * The caller should therefore provide @fixupcontext as an array of |
| 233 | * size FIXUP_MAX whose elements have been initialized for at least |
| 234 | * the entries that @insns refers to. |
| 235 | */ |
| 236 | void arm_write_bootloader(const char *name, |
| 237 | AddressSpace *as, hwaddr addr, |
| 238 | const ARMInsnFixup *insns, |
| 239 | const uint32_t *fixupcontext); |
| 240 | |
| 241 | #endif /* HW_ARM_BOOT_H */ |