| 1 | /* |
| 2 | * Common definitions for Arm Base System Architecture (BSA) platforms. |
| 3 | * |
| 4 | * Copyright (c) 2015 Linaro Limited |
| 5 | * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms and conditions of the GNU General Public License, |
| 9 | * version 2 or later, as published by the Free Software Foundation. |
| 10 | * |
| 11 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 14 | * more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License along with |
| 17 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 18 | * |
| 19 | */ |
| 20 | |
| 21 | #ifndef QEMU_ARM_BSA_H |
| 22 | #define QEMU_ARM_BSA_H |
| 23 | |
| 24 | /* These are architectural INTID values */ |
| 25 | #define ARCH_TIMER_S_EL2_VIRT_IRQ 19 |
| 26 | #define ARCH_TIMER_S_EL2_IRQ 20 |
| 27 | #define VIRTUAL_PMU_IRQ 23 |
| 28 | #define ARCH_GIC_MAINT_IRQ 25 |
| 29 | #define ARCH_TIMER_NS_EL2_IRQ 26 |
| 30 | #define ARCH_TIMER_VIRT_IRQ 27 |
| 31 | #define ARCH_TIMER_NS_EL2_VIRT_IRQ 28 |
| 32 | #define ARCH_TIMER_S_EL1_IRQ 29 |
| 33 | #define ARCH_TIMER_NS_EL1_IRQ 30 |
| 34 | |
| 35 | #define INTID_TO_PPI(irq) ((irq) - 16) |
| 36 | |
| 37 | #endif /* QEMU_ARM_BSA_H */ |