| 1 | #ifndef HW_ESCC_H |
| 2 | #define HW_ESCC_H |
| 3 | |
| 4 | #include "chardev/char-fe.h" |
| 5 | #include "chardev/char-serial.h" |
| 6 | #include "hw/core/sysbus.h" |
| 7 | #include "ui/input.h" |
| 8 | #include "qom/object.h" |
| 9 | |
| 10 | /* escc.c */ |
| 11 | #define TYPE_ESCC "escc" |
| 12 | #define ESCC_SIZE 4 |
| 13 | |
| 14 | OBJECT_DECLARE_SIMPLE_TYPE(ESCCState, ESCC) |
| 15 | |
| 16 | typedef enum { |
| 17 | escc_chn_a, escc_chn_b, |
| 18 | } ESCCChnID; |
| 19 | |
| 20 | typedef enum { |
| 21 | escc_serial, escc_kbd, escc_mouse, |
| 22 | } ESCCChnType; |
| 23 | |
| 24 | #define ESCC_SERIO_QUEUE_SIZE 256 |
| 25 | |
| 26 | typedef struct { |
| 27 | uint8_t data[ESCC_SERIO_QUEUE_SIZE]; |
| 28 | int rptr, wptr, count; |
| 29 | } ESCCSERIOQueue; |
| 30 | |
| 31 | #define ESCC_SERIAL_REGS 16 |
| 32 | typedef struct ESCCChannelState { |
| 33 | qemu_irq irq; |
| 34 | uint32_t rxint, txint, rxint_under_svc, txint_under_svc; |
| 35 | struct ESCCChannelState *otherchn; |
| 36 | uint32_t reg; |
| 37 | uint8_t wregs[ESCC_SERIAL_REGS], rregs[ESCC_SERIAL_REGS]; |
| 38 | ESCCSERIOQueue queue; |
| 39 | CharFrontend chr; |
| 40 | int e0_mode, led_mode, caps_lock_mode, num_lock_mode; |
| 41 | int disabled; |
| 42 | int clock; |
| 43 | uint32_t vmstate_dummy; |
| 44 | ESCCChnID chn; /* this channel, A (base+4) or B (base+0) */ |
| 45 | ESCCChnType type; |
| 46 | uint8_t rx, tx; |
| 47 | QemuInputHandlerState *hs; |
| 48 | char *sunkbd_layout; |
| 49 | int sunmouse_dx; |
| 50 | int sunmouse_dy; |
| 51 | int sunmouse_buttons; |
| 52 | } ESCCChannelState; |
| 53 | |
| 54 | struct ESCCState { |
| 55 | SysBusDevice parent_obj; |
| 56 | |
| 57 | struct ESCCChannelState chn[2]; |
| 58 | uint32_t it_shift; |
| 59 | bool bit_swap; |
| 60 | MemoryRegion mmio; |
| 61 | uint32_t disabled; |
| 62 | uint32_t frequency; |
| 63 | }; |
| 64 | |
| 65 | #endif |