| 1 | /* |
| 2 | * nRF51 SoC UART emulation |
| 3 | * |
| 4 | * Copyright (c) 2018 Julia Suvorova <jusual@mail.ru> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 or |
| 8 | * (at your option) any later version. |
| 9 | */ |
| 10 | |
| 11 | #ifndef NRF51_UART_H |
| 12 | #define NRF51_UART_H |
| 13 | |
| 14 | #include "hw/core/sysbus.h" |
| 15 | #include "chardev/char-fe.h" |
| 16 | #include "hw/core/registerfields.h" |
| 17 | #include "qom/object.h" |
| 18 | |
| 19 | #define UART_FIFO_LENGTH 6 |
| 20 | #define UART_SIZE 0x1000 |
| 21 | |
| 22 | #define TYPE_NRF51_UART "nrf51_soc.uart" |
| 23 | OBJECT_DECLARE_SIMPLE_TYPE(NRF51UARTState, NRF51_UART) |
| 24 | |
| 25 | REG32(UART_STARTRX, 0x000) |
| 26 | REG32(UART_STOPRX, 0x004) |
| 27 | REG32(UART_STARTTX, 0x008) |
| 28 | REG32(UART_STOPTX, 0x00C) |
| 29 | REG32(UART_SUSPEND, 0x01C) |
| 30 | |
| 31 | REG32(UART_CTS, 0x100) |
| 32 | REG32(UART_NCTS, 0x104) |
| 33 | REG32(UART_RXDRDY, 0x108) |
| 34 | REG32(UART_TXDRDY, 0x11C) |
| 35 | REG32(UART_ERROR, 0x124) |
| 36 | REG32(UART_RXTO, 0x144) |
| 37 | |
| 38 | REG32(UART_INTEN, 0x300) |
| 39 | FIELD(UART_INTEN, CTS, 0, 1) |
| 40 | FIELD(UART_INTEN, NCTS, 1, 1) |
| 41 | FIELD(UART_INTEN, RXDRDY, 2, 1) |
| 42 | FIELD(UART_INTEN, TXDRDY, 7, 1) |
| 43 | FIELD(UART_INTEN, ERROR, 9, 1) |
| 44 | FIELD(UART_INTEN, RXTO, 17, 1) |
| 45 | REG32(UART_INTENSET, 0x304) |
| 46 | REG32(UART_INTENCLR, 0x308) |
| 47 | REG32(UART_ERRORSRC, 0x480) |
| 48 | REG32(UART_ENABLE, 0x500) |
| 49 | REG32(UART_PSELRTS, 0x508) |
| 50 | REG32(UART_PSELTXD, 0x50C) |
| 51 | REG32(UART_PSELCTS, 0x510) |
| 52 | REG32(UART_PSELRXD, 0x514) |
| 53 | REG32(UART_RXD, 0x518) |
| 54 | REG32(UART_TXD, 0x51C) |
| 55 | REG32(UART_BAUDRATE, 0x524) |
| 56 | REG32(UART_CONFIG, 0x56C) |
| 57 | |
| 58 | struct NRF51UARTState { |
| 59 | SysBusDevice parent_obj; |
| 60 | |
| 61 | MemoryRegion iomem; |
| 62 | CharFrontend chr; |
| 63 | qemu_irq irq; |
| 64 | guint watch_tag; |
| 65 | |
| 66 | uint8_t rx_fifo[UART_FIFO_LENGTH]; |
| 67 | unsigned int rx_fifo_pos; |
| 68 | unsigned int rx_fifo_len; |
| 69 | |
| 70 | uint32_t reg[0x56C]; |
| 71 | |
| 72 | bool rx_started; |
| 73 | bool tx_started; |
| 74 | bool pending_tx_byte; |
| 75 | bool enabled; |
| 76 | }; |
| 77 | |
| 78 | #endif |