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1 /*
2 * This program is free software; you can redistribute it and/or modify it
3 * under the terms and conditions of the GNU General Public License,
4 * version 2 or later, as published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
9 * more details.
10 *
11 * You should have received a copy of the GNU General Public License along with
12 * this program. If not, see <http://www.gnu.org/licenses/>.
13 */
14
15 #ifndef HW_PL011_H
16 #define HW_PL011_H
17
18 #include "hw/core/sysbus.h"
19 #include "chardev/char-fe.h"
20 #include "qom/object.h"
21
22 #define TYPE_PL011 "pl011"
23 OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
24
25 /* This shares the same struct (and cast macro) as the base pl011 device */
26 #define TYPE_PL011_LUMINARY "pl011_luminary"
27
28 /* Depth of UART FIFO in bytes, when FIFO mode is enabled (else depth == 1) */
29 #define PL011_FIFO_DEPTH 16
30
31 struct PL011State {
32 SysBusDevice parent_obj;
33
34 MemoryRegion iomem;
35 uint32_t flags;
36 uint32_t lcr;
37 uint32_t rsr;
38 uint32_t cr;
39 uint32_t dmacr;
40 uint32_t int_enabled;
41 uint32_t int_level;
42 uint32_t read_fifo[PL011_FIFO_DEPTH];
43 uint32_t ilpr;
44 uint32_t ibrd;
45 uint32_t fbrd;
46 uint32_t ifl;
47 int read_pos;
48 int read_count;
49 int read_trigger;
50 CharFrontend chr;
51 qemu_irq irq[6];
52 Clock *clk;
53 bool migrate_clk;
54 bool logged_disabled_uart;
55 const unsigned char *id;
56 /*
57 * Since some users embed this struct directly, we must
58 * ensure that the C struct is at least as big as the Rust one.
59 */
60 uint8_t padding_for_rust[16];
61 };
62
63 DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr);
64
65 #endif