| 1 | /* |
| 2 | * Renesas Serial Communication Interface |
| 3 | * |
| 4 | * Copyright (c) 2018 Yoshinori Sato |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 7 | */ |
| 8 | |
| 9 | #ifndef HW_CHAR_RENESAS_SCI_H |
| 10 | #define HW_CHAR_RENESAS_SCI_H |
| 11 | |
| 12 | #include "chardev/char-fe.h" |
| 13 | #include "hw/core/sysbus.h" |
| 14 | #include "qom/object.h" |
| 15 | |
| 16 | #define TYPE_RENESAS_SCI "renesas-sci" |
| 17 | typedef struct RSCIState RSCIState; |
| 18 | DECLARE_INSTANCE_CHECKER(RSCIState, RSCI, |
| 19 | TYPE_RENESAS_SCI) |
| 20 | |
| 21 | enum { |
| 22 | ERI = 0, |
| 23 | RXI = 1, |
| 24 | TXI = 2, |
| 25 | TEI = 3, |
| 26 | SCI_NR_IRQ = 4 |
| 27 | }; |
| 28 | |
| 29 | struct RSCIState { |
| 30 | /*< private >*/ |
| 31 | SysBusDevice parent_obj; |
| 32 | /*< public >*/ |
| 33 | |
| 34 | MemoryRegion memory; |
| 35 | QEMUTimer timer; |
| 36 | CharFrontend chr; |
| 37 | qemu_irq irq[SCI_NR_IRQ]; |
| 38 | |
| 39 | uint8_t smr; |
| 40 | uint8_t brr; |
| 41 | uint8_t scr; |
| 42 | uint8_t tdr; |
| 43 | uint8_t ssr; |
| 44 | uint8_t rdr; |
| 45 | uint8_t scmr; |
| 46 | uint8_t semr; |
| 47 | |
| 48 | uint8_t read_ssr; |
| 49 | int64_t trtime; |
| 50 | int64_t rx_next; |
| 51 | uint64_t input_freq; |
| 52 | }; |
| 53 | |
| 54 | #endif |