| 1 | #ifndef HW_DISPLAY_BOCHS_VBE_H |
| 2 | #define HW_DISPLAY_BOCHS_VBE_H |
| 3 | |
| 4 | /* |
| 5 | * bochs vesa bios extension interface |
| 6 | */ |
| 7 | |
| 8 | #define VBE_DISPI_MAX_XRES 16000 |
| 9 | #define VBE_DISPI_MAX_YRES 12000 |
| 10 | #define VBE_DISPI_MAX_BPP 32 |
| 11 | |
| 12 | #define VBE_DISPI_INDEX_ID 0x0 |
| 13 | #define VBE_DISPI_INDEX_XRES 0x1 |
| 14 | #define VBE_DISPI_INDEX_YRES 0x2 |
| 15 | #define VBE_DISPI_INDEX_BPP 0x3 |
| 16 | #define VBE_DISPI_INDEX_ENABLE 0x4 |
| 17 | #define VBE_DISPI_INDEX_BANK 0x5 |
| 18 | #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6 |
| 19 | #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7 |
| 20 | #define VBE_DISPI_INDEX_X_OFFSET 0x8 |
| 21 | #define VBE_DISPI_INDEX_Y_OFFSET 0x9 |
| 22 | #define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */ |
| 23 | #define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */ |
| 24 | |
| 25 | /* VBE_DISPI_INDEX_ID */ |
| 26 | #define VBE_DISPI_ID0 0xB0C0 |
| 27 | #define VBE_DISPI_ID1 0xB0C1 |
| 28 | #define VBE_DISPI_ID2 0xB0C2 |
| 29 | #define VBE_DISPI_ID3 0xB0C3 |
| 30 | #define VBE_DISPI_ID4 0xB0C4 |
| 31 | #define VBE_DISPI_ID5 0xB0C5 |
| 32 | |
| 33 | /* VBE_DISPI_INDEX_ENABLE */ |
| 34 | #define VBE_DISPI_DISABLED 0x00 |
| 35 | #define VBE_DISPI_ENABLED 0x01 |
| 36 | #define VBE_DISPI_GETCAPS 0x02 |
| 37 | #define VBE_DISPI_8BIT_DAC 0x20 |
| 38 | #define VBE_DISPI_LFB_ENABLED 0x40 |
| 39 | #define VBE_DISPI_NOCLEARMEM 0x80 |
| 40 | |
| 41 | /* only used by isa-vga, pci vga devices use a memory bar */ |
| 42 | #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000 |
| 43 | |
| 44 | |
| 45 | /* |
| 46 | * qemu extension: mmio bar (region 2) |
| 47 | */ |
| 48 | |
| 49 | #define PCI_VGA_MMIO_SIZE 0x1000 |
| 50 | |
| 51 | /* vga register region */ |
| 52 | #define PCI_VGA_IOPORT_OFFSET 0x400 |
| 53 | #define PCI_VGA_IOPORT_SIZE (0x3e0 - 0x3c0) |
| 54 | |
| 55 | /* bochs vbe register region */ |
| 56 | #define PCI_VGA_BOCHS_OFFSET 0x500 |
| 57 | #define PCI_VGA_BOCHS_SIZE (0x0b * 2) |
| 58 | |
| 59 | /* qemu extension register region */ |
| 60 | #define PCI_VGA_QEXT_OFFSET 0x600 |
| 61 | #define PCI_VGA_QEXT_SIZE (2 * 4) |
| 62 | |
| 63 | /* qemu extension registers */ |
| 64 | #define PCI_VGA_QEXT_REG_SIZE (0 * 4) |
| 65 | #define PCI_VGA_QEXT_REG_BYTEORDER (1 * 4) |
| 66 | #define PCI_VGA_QEXT_LITTLE_ENDIAN 0x1e1e1e1e |
| 67 | #define PCI_VGA_QEXT_BIG_ENDIAN 0xbebebebe |
| 68 | |
| 69 | #endif /* HW_DISPLAY_BOCHS_VBE_H */ |