master
h 68 lines 1.9 KB
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1 /*
2 * ASPEED Serial GPIO Controller
3 *
4 * Copyright 2025 Google LLC.
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8 #ifndef ASPEED_SGPIO_H
9 #define ASPEED_SGPIO_H
10
11 #include "hw/core/sysbus.h"
12 #include "qom/object.h"
13 #include "hw/core/registerfields.h"
14
15 #define TYPE_ASPEED_SGPIO "aspeed.sgpio"
16 OBJECT_DECLARE_TYPE(AspeedSGPIOState, AspeedSGPIOClass, ASPEED_SGPIO)
17
18 #define ASPEED_SGPIO_MAX_PIN_PAIR 256
19 #define ASPEED_SGPIO_MAX_INT 8
20
21 /* AST2700 SGPIO Register Address Offsets */
22 REG32(SGPIO_INT_STATUS_0, 0x40)
23 REG32(SGPIO_INT_STATUS_1, 0x44)
24 REG32(SGPIO_INT_STATUS_2, 0x48)
25 REG32(SGPIO_INT_STATUS_3, 0x4C)
26 REG32(SGPIO_INT_STATUS_4, 0x50)
27 REG32(SGPIO_INT_STATUS_5, 0x54)
28 REG32(SGPIO_INT_STATUS_6, 0x58)
29 REG32(SGPIO_INT_STATUS_7, 0x5C)
30 /* AST2700 SGPIO_0 - SGPIO_255 Control Register */
31 REG32(SGPIO_0_CONTROL, 0x80)
32 SHARED_FIELD(SGPIO_SERIAL_OUT_VAL, 0, 1)
33 SHARED_FIELD(SGPIO_PARALLEL_OUT_VAL, 1, 1)
34 SHARED_FIELD(SGPIO_INT_EN, 2, 1)
35 SHARED_FIELD(SGPIO_INT_TYPE, 3, 3)
36 SHARED_FIELD(SGPIO_RESET_POLARITY, 6, 1)
37 SHARED_FIELD(SGPIO_RESERVED_1, 7, 2)
38 SHARED_FIELD(SGPIO_INPUT_MASK, 9, 1)
39 SHARED_FIELD(SGPIO_PARALLEL_EN, 10, 1)
40 SHARED_FIELD(SGPIO_PARALLEL_IN_MODE, 11, 1)
41 SHARED_FIELD(SGPIO_INT_STATUS, 12, 1)
42 SHARED_FIELD(SGPIO_SERIAL_IN_VAL, 13, 1)
43 SHARED_FIELD(SGPIO_PARALLEL_IN_VAL, 14, 1)
44 SHARED_FIELD(SGPIO_RESERVED_2, 15, 12)
45 SHARED_FIELD(SGPIO_WRITE_PROTECT, 31, 1)
46 REG32(SGPIO_255_CONTROL, 0x47C)
47
48 struct AspeedSGPIOClass {
49 SysBusDeviceClass parent_class;
50 uint32_t nr_sgpio_pin_pairs;
51 uint64_t mem_size;
52 const MemoryRegionOps *reg_ops;
53 };
54
55 struct AspeedSGPIOState {
56 /* <private> */
57 SysBusDevice parent;
58
59 /*< public >*/
60 MemoryRegion iomem;
61 int pending;
62 qemu_irq irq;
63 qemu_irq sgpios[ASPEED_SGPIO_MAX_PIN_PAIR];
64 uint32_t ctrl_regs[ASPEED_SGPIO_MAX_PIN_PAIR];
65 uint32_t int_regs[ASPEED_SGPIO_MAX_INT];
66 };
67
68 #endif /* ASPEED_SGPIO_H */