| 1 | /* |
| 2 | * Hexagon subsystem helpers shared between the machine models. |
| 3 | * |
| 4 | * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. |
| 5 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 6 | */ |
| 7 | |
| 8 | #ifndef HW_HEXAGON_HEX_SUBSYS_H |
| 9 | #define HW_HEXAGON_HEX_SUBSYS_H |
| 10 | |
| 11 | #include "hw/hexagon/hexagon.h" |
| 12 | #include "hw/core/qdev.h" |
| 13 | |
| 14 | /* Create the subsystem shared by every Hexagon machine. */ |
| 15 | void hex_subsys_create(HexagonCommonMachineState *hms, |
| 16 | const struct hexagon_machine_config *m_cfg, Rev_t rev); |
| 17 | |
| 18 | /* |
| 19 | * Parent a CPU into the subsystem's cluster and wire its links. Call for |
| 20 | * every CPU before hex_subsys_realize_cluster(), then realize each CPU with |
| 21 | * hex_subsys_realize_cpu(). CPU[0] receives the L2VIC outputs. |
| 22 | */ |
| 23 | void hex_subsys_add_cpu(HexagonCommonMachineState *hms, DeviceState *cpu); |
| 24 | |
| 25 | /* Realize the CPU cluster, once all CPUs have been parented into it. */ |
| 26 | void hex_subsys_realize_cluster(HexagonCommonMachineState *hms); |
| 27 | |
| 28 | /* Realize a CPU previously parented via hex_subsys_add_cpu(). */ |
| 29 | void hex_subsys_realize_cpu(HexagonCommonMachineState *hms, DeviceState *cpu, |
| 30 | bool boot_cpu); |
| 31 | |
| 32 | #endif /* HW_HEXAGON_HEX_SUBSYS_H */ |