| 1 | /* |
| 2 | * Hexagon TLB QOM Device |
| 3 | * |
| 4 | * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. |
| 5 | * SPDX-License-Identifier: GPL-2.0-or-later |
| 6 | */ |
| 7 | |
| 8 | #ifndef HW_HEXAGON_TLB_H |
| 9 | #define HW_HEXAGON_TLB_H |
| 10 | |
| 11 | #include "hw/core/sysbus.h" |
| 12 | #include "qom/object.h" |
| 13 | #include "exec/hwaddr.h" |
| 14 | #include "exec/mmu-access-type.h" |
| 15 | #include "monitor/hmp.h" |
| 16 | |
| 17 | #define TYPE_HEXAGON_TLB "hexagon-tlb" |
| 18 | OBJECT_DECLARE_SIMPLE_TYPE(HexagonTLBState, HEXAGON_TLB) |
| 19 | |
| 20 | struct HexagonTLBState { |
| 21 | SysBusDevice parent_obj; |
| 22 | |
| 23 | uint32_t num_entries; |
| 24 | uint64_t *entries; |
| 25 | }; |
| 26 | |
| 27 | uint64_t hexagon_tlb_read(HexagonTLBState *tlb, uint32_t index); |
| 28 | void hexagon_tlb_write(HexagonTLBState *tlb, uint32_t index, uint64_t value); |
| 29 | |
| 30 | bool hexagon_tlb_find_match(HexagonTLBState *tlb, uint32_t asid, |
| 31 | uint32_t VA, MMUAccessType access_type, |
| 32 | hwaddr *PA, int *prot, uint64_t *size, |
| 33 | int32_t *excp, int *cause_code, int mmu_idx); |
| 34 | |
| 35 | uint32_t hexagon_tlb_lookup(HexagonTLBState *tlb, uint32_t asid, |
| 36 | uint32_t VA, int *cause_code); |
| 37 | |
| 38 | int hexagon_tlb_check_overlap(HexagonTLBState *tlb, uint64_t entry, |
| 39 | uint64_t index); |
| 40 | |
| 41 | void hexagon_tlb_dump(MonitorHMP *hmp, HexagonTLBState *tlb); |
| 42 | |
| 43 | bool hexagon_tlb_dump_entry(MonitorHMP *hmp, uint64_t entry); |
| 44 | |
| 45 | uint32_t hexagon_tlb_get_num_entries(HexagonTLBState *tlb); |
| 46 | |
| 47 | #endif /* HW_HEXAGON_TLB_H */ |