| 1 | /* |
| 2 | * Copyright (c) 2018 Intel Corporation |
| 3 | * Copyright (c) 2019 Red Hat, Inc. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms and conditions of the GNU General Public License, |
| 7 | * version 2 or later, as published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef HW_I386_MICROVM_H |
| 19 | #define HW_I386_MICROVM_H |
| 20 | |
| 21 | #include "exec/hwaddr.h" |
| 22 | #include "qemu/notify.h" |
| 23 | |
| 24 | #include "hw/core/boards.h" |
| 25 | #include "hw/i386/x86.h" |
| 26 | #include "hw/acpi/acpi_dev_interface.h" |
| 27 | #include "hw/pci-host/gpex.h" |
| 28 | #include "qom/object.h" |
| 29 | |
| 30 | /* |
| 31 | * IRQ | pc | microvm (acpi=on) |
| 32 | * --------+------------+------------------ |
| 33 | * 0 | pit | |
| 34 | * 1 | kbd | |
| 35 | * 2 | cascade | |
| 36 | * 3 | serial 1 | |
| 37 | * 4 | serial 0 | serial |
| 38 | * 5 | - | |
| 39 | * 6 | floppy | |
| 40 | * 7 | parallel | |
| 41 | * 8 | rtc | rtc (rtc=on) |
| 42 | * 9 | acpi | acpi (ged) |
| 43 | * 10 | pci lnk | xhci (usb=on) |
| 44 | * 11 | pci lnk | |
| 45 | * 12 | ps2 | pcie |
| 46 | * 13 | fpu | pcie |
| 47 | * 14 | ide 0 | pcie |
| 48 | * 15 | ide 1 | pcie |
| 49 | * 16-23 | pci gsi | virtio |
| 50 | */ |
| 51 | |
| 52 | /* Platform virtio definitions */ |
| 53 | #define VIRTIO_MMIO_BASE 0xfeb00000 |
| 54 | #define VIRTIO_CMDLINE_MAXLEN 64 |
| 55 | |
| 56 | #define GED_MMIO_BASE 0xfea00000 |
| 57 | #define GED_MMIO_BASE_MEMHP (GED_MMIO_BASE + 0x100) |
| 58 | #define GED_MMIO_BASE_REGS (GED_MMIO_BASE + 0x200) |
| 59 | #define GED_MMIO_IRQ 9 |
| 60 | |
| 61 | #define MICROVM_XHCI_BASE 0xfe900000 |
| 62 | #define MICROVM_XHCI_IRQ 10 |
| 63 | |
| 64 | #define PCIE_MMIO_BASE 0xc0000000 |
| 65 | #define PCIE_MMIO_SIZE 0x20000000 |
| 66 | #define PCIE_ECAM_BASE 0xe0000000 |
| 67 | #define PCIE_ECAM_SIZE 0x10000000 |
| 68 | |
| 69 | /* Machine type options */ |
| 70 | #define MICROVM_MACHINE_RTC "rtc" |
| 71 | #define MICROVM_MACHINE_PCIE "pcie" |
| 72 | #define MICROVM_MACHINE_IOAPIC2 "ioapic2" |
| 73 | #define MICROVM_MACHINE_ISA_SERIAL "isa-serial" |
| 74 | #define MICROVM_MACHINE_OPTION_ROMS "x-option-roms" |
| 75 | #define MICROVM_MACHINE_AUTO_KERNEL_CMDLINE "auto-kernel-cmdline" |
| 76 | |
| 77 | struct MicrovmMachineClass { |
| 78 | X86MachineClass parent; |
| 79 | HotplugHandler *(*orig_hotplug_handler)(MachineState *machine, |
| 80 | DeviceState *dev); |
| 81 | void (*x86_load_linux)(X86MachineState *x86ms, FWCfgState *fw_cfg, |
| 82 | int acpi_data_size); |
| 83 | }; |
| 84 | |
| 85 | struct MicrovmMachineState { |
| 86 | X86MachineState parent; |
| 87 | |
| 88 | /* Machine type options */ |
| 89 | OnOffAuto rtc; |
| 90 | OnOffAuto pcie; |
| 91 | OnOffAuto ioapic2; |
| 92 | bool isa_serial; |
| 93 | bool option_roms; |
| 94 | bool auto_kernel_cmdline; |
| 95 | |
| 96 | /* Machine state */ |
| 97 | uint32_t pcie_irq_base; |
| 98 | uint32_t virtio_irq_base; |
| 99 | uint32_t virtio_num_transports; |
| 100 | bool kernel_cmdline_fixed; |
| 101 | Notifier machine_done; |
| 102 | Notifier powerdown_req; |
| 103 | struct GPEXConfig gpex; |
| 104 | |
| 105 | uint32_t ioapic_phandle[2]; |
| 106 | }; |
| 107 | |
| 108 | #define TYPE_MICROVM_MACHINE MACHINE_TYPE_NAME("microvm") |
| 109 | OBJECT_DECLARE_TYPE(MicrovmMachineState, MicrovmMachineClass, MICROVM_MACHINE) |
| 110 | |
| 111 | #endif |