| 1 | /* |
| 2 | * ASPEED I3C Controller |
| 3 | * |
| 4 | * Copyright (C) 2021 ASPEED Technology Inc. |
| 5 | * Copyright (C) 2023 Google, LLC |
| 6 | * |
| 7 | * This code is licensed under the GPL version 2 or later. See |
| 8 | * the COPYING file in the top-level directory. |
| 9 | */ |
| 10 | |
| 11 | #ifndef ASPEED_I3C_H |
| 12 | #define ASPEED_I3C_H |
| 13 | |
| 14 | #include "hw/i3c/dw-i3c.h" |
| 15 | #include "hw/core/sysbus.h" |
| 16 | |
| 17 | #define TYPE_ASPEED_I3C "aspeed.i3c" |
| 18 | OBJECT_DECLARE_TYPE(AspeedI3CState, AspeedI3CClass, ASPEED_I3C) |
| 19 | |
| 20 | #define ASPEED_I3C_NR_REGS (0x70 >> 2) |
| 21 | #define ASPEED_I3C_NR_DEVICES 6 |
| 22 | |
| 23 | struct AspeedI3CState { |
| 24 | SysBusDevice parent_obj; |
| 25 | |
| 26 | MemoryRegion iomem; |
| 27 | MemoryRegion iomem_container; |
| 28 | qemu_irq irq; |
| 29 | |
| 30 | uint32_t regs[ASPEED_I3C_NR_REGS]; |
| 31 | DWI3C devices[ASPEED_I3C_NR_DEVICES]; |
| 32 | uint8_t id; |
| 33 | }; |
| 34 | |
| 35 | I3CBus *aspeed_i3c_get_bus(AspeedI3CState *s, uint8_t bus_num); |
| 36 | |
| 37 | #endif /* ASPEED_I3C_H */ |