master
h 69 lines 1.72 KB
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1 #ifndef HW_IDE_PCI_H
2 #define HW_IDE_PCI_H
3
4 #include "hw/ide/ide-bus.h"
5 #include "hw/pci/pci_device.h"
6 #include "qom/object.h"
7
8 #define BM_STATUS_DMAING 0x01
9 #define BM_STATUS_ERROR 0x02
10 #define BM_STATUS_INT 0x04
11
12 #define BM_CMD_START 0x01
13 #define BM_CMD_READ 0x08
14
15 typedef struct BMDMAState {
16 IDEDMA dma;
17 uint8_t cmd;
18 uint8_t status;
19 uint32_t addr;
20
21 IDEBus *bus;
22 /* current transfer state */
23 uint32_t cur_addr;
24 uint32_t cur_prd_last;
25 uint32_t cur_prd_addr;
26 uint32_t cur_prd_len;
27 BlockCompletionFunc *dma_cb;
28 MemoryRegion addr_ioport;
29 MemoryRegion extra_io;
30 qemu_irq irq;
31
32 /* Bit 0-2 and 7: BM status register
33 * Bit 3-6: bus->error_status */
34 uint8_t migration_compat_status;
35 uint8_t migration_retry_unit;
36 int64_t migration_retry_sector_num;
37 uint32_t migration_retry_nsector;
38
39 struct PCIIDEState *pci_dev;
40 } BMDMAState;
41
42 #define TYPE_PCI_IDE "pci-ide"
43 OBJECT_DECLARE_SIMPLE_TYPE(PCIIDEState, PCI_IDE)
44
45 struct PCIIDEState {
46 /*< private >*/
47 PCIDevice parent_obj;
48 /*< public >*/
49
50 IDEBus bus[2];
51 BMDMAState bmdma[2];
52 qemu_irq isa_irq[2];
53 uint32_t secondary; /* used only for cmd646 */
54 MemoryRegion bmdma_bar;
55 MemoryRegion cmd_bar[2];
56 MemoryRegion data_bar[2];
57 };
58
59 void bmdma_init(IDEBus *bus, BMDMAState *bm, PCIIDEState *d);
60 void bmdma_cmd_writeb(BMDMAState *bm, uint32_t val);
61 void bmdma_status_writeb(BMDMAState *bm, uint32_t val);
62 extern MemoryRegionOps bmdma_addr_ioport_ops;
63 void pci_ide_create_devs(PCIDevice *dev);
64 void pci_ide_update_mode(PCIIDEState *s);
65
66 extern const VMStateDescription vmstate_ide_pci;
67 extern const MemoryRegionOps pci_ide_cmd_le_ops;
68 extern const MemoryRegionOps pci_ide_data_le_ops;
69 #endif