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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Definitions for loongarch board emulation.
4 *
5 * Copyright (C) 2021 Loongson Technology Corporation Limited
6 */
7
8 #ifndef HW_LOONGARCH_H
9 #define HW_LOONGARCH_H
10
11 #include "hw/core/boards.h"
12 #include "qemu/queue.h"
13 #include "hw/block/flash.h"
14 #include "hw/loongarch/boot.h"
15 #include "hw/pci-host/gpex.h"
16
17 /* IOCSR region */
18 #define VERSION_REG 0x0
19 #define FEATURE_REG 0x8
20 #define IOCSRF_TEMP 0
21 #define IOCSRF_NODECNT 1
22 #define IOCSRF_MSI 2
23 #define IOCSRF_EXTIOI 3
24 #define IOCSRF_CSRIPI 4
25 #define IOCSRF_FREQCSR 5
26 #define IOCSRF_FREQSCALE 6
27 #define IOCSRF_DVFSV1 7
28 #define IOCSRF_GMOD 9
29 #define IOCSRF_VM 11
30 #define IOCSRF_DMSI 15
31 #define VENDOR_REG 0x10
32 #define CPUNAME_REG 0x20
33 #define MISC_FUNC_REG 0x420
34 #define IOCSRM_EXTIOI_EN 48
35 #define IOCSRM_EXTIOI_INT_ENCODE 49
36 #define IOCSRM_DMSI_EN 51
37
38 #define LOONGARCH_MAX_CPUS 256
39
40 /* MMIO memory region */
41 #define VIRT_PCH_REG_BASE 0x10000000UL
42 #define VIRT_PCH_REG_SIZE 0x400
43 #define VIRT_RTC_REG_BASE 0x100d0100UL
44 #define VIRT_RTC_LEN 0x100
45 #define VIRT_PLATFORM_BUS_BASEADDRESS 0x16000000UL
46 #define VIRT_PLATFORM_BUS_SIZE 0x02000000
47 #define VIRT_PCI_IO_BASE 0x18004000UL
48 #define VIRT_PCI_IO_OFFSET 0x4000
49 #define VIRT_PCI_IO_SIZE 0xC000
50 #define VIRT_BIOS_BASE 0x1c000000UL
51 #define VIRT_BIOS_SIZE 0x01000000UL
52 #define VIRT_FLASH_SECTOR_SIZE (256 * KiB)
53 #define VIRT_FLASH0_BASE VIRT_BIOS_BASE
54 #define VIRT_FLASH0_SIZE VIRT_BIOS_SIZE
55 #define VIRT_FLASH1_BASE 0x1d000000UL
56 #define VIRT_FLASH1_SIZE 0x01000000UL
57 #define VIRT_FWCFG_BASE 0x1e020000UL
58 #define VIRT_UART_BASE 0x1fe001e0UL
59 #define VIRT_UART_SIZE 0x100
60 #define VIRT_PCI_CFG_BASE 0x20000000UL
61 #define VIRT_PCI_CFG_SIZE 0x08000000UL
62 #define VIRT_DINTC_BASE 0x2FE00000UL
63 #define VIRT_DINTC_SIZE 0x00100000UL
64 #define VIRT_PCH_MSI_ADDR_LOW 0x2FF00000UL
65 #define VIRT_PCH_MSI_SIZE 0x8
66 #define VIRT_PCI_MEM_BASE 0x40000000UL
67 #define VIRT_PCI_MEM_SIZE 0x40000000UL
68
69 #define VIRT_LOWMEM_BASE 0
70 #define VIRT_LOWMEM_SIZE 0x10000000
71 #define FDT_BASE 0x100000
72 #define VIRT_HIGHMEM_BASE 0x80000000
73 #define VIRT_GED_EVT_ADDR 0x100e0000
74 #define VIRT_GED_MEM_ADDR QEMU_ALIGN_UP(VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN, 4)
75 #define VIRT_GED_REG_ADDR QEMU_ALIGN_UP(VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN, 4)
76 #define VIRT_GED_CPUHP_ADDR QEMU_ALIGN_UP(VIRT_GED_REG_ADDR + ACPI_GED_REG_COUNT, 4)
77
78 /*
79 * GSI_BASE is hard-coded with 64 in linux kernel, else kernel fails to boot
80 * 0 - 15 GSI for ISA devices even if there is no ISA devices
81 * 16 - 63 GSI for CPU devices such as timers/perf monitor etc
82 * 64 - GSI for external devices
83 */
84 #define VIRT_PCH_PIC_IRQ_NUM 32
85 #define VIRT_GSI_BASE 64
86 #define VIRT_DEVICE_IRQS 16
87 #define VIRT_UART_IRQ (VIRT_GSI_BASE + 2)
88 #define VIRT_UART_COUNT 4
89 #define VIRT_RTC_IRQ (VIRT_GSI_BASE + 6)
90 #define VIRT_SCI_IRQ (VIRT_GSI_BASE + 7)
91 #define VIRT_PLATFORM_BUS_IRQ (VIRT_GSI_BASE + 8)
92 #define VIRT_PLATFORM_BUS_NUM_IRQS 2
93
94 #define COMMAND_LINE_SIZE 512
95
96 struct LoongArchVirtMachineState {
97 /*< private >*/
98 MachineState parent_obj;
99
100 MemoryRegion lowmem;
101 MemoryRegion highmem;
102 MemoryRegion bios;
103 bool bios_loaded;
104 /* State for other subsystems/APIs: */
105 FWCfgState *fw_cfg;
106 Notifier machine_done;
107 Notifier powerdown_notifier;
108 OnOffAuto acpi;
109 OnOffAuto veiointc;
110 OnOffAuto dmsi;
111 char *oem_id;
112 char *oem_table_id;
113 DeviceState *acpi_ged;
114 int fdt_size;
115 DeviceState *platform_bus_dev;
116 PFlashCFI01 *flash[2];
117 MemoryRegion system_iocsr;
118 MemoryRegion iocsr_mem;
119 AddressSpace as_iocsr;
120 struct loongarch_boot_info bootinfo;
121 DeviceState *ipi;
122 DeviceState *extioi;
123 struct memmap_entry *memmap_table;
124 unsigned int memmap_entries;
125 uint64_t misc_feature;
126 uint64_t misc_status;
127 DeviceState *dintc;
128 hwaddr ram_end;
129 struct GPEXConfig gpex;
130 bool highmem_mmio;
131 };
132
133 #define TYPE_LOONGARCH_VIRT_MACHINE MACHINE_TYPE_NAME("virt")
134 OBJECT_DECLARE_SIMPLE_TYPE(LoongArchVirtMachineState, LOONGARCH_VIRT_MACHINE)
135 void virt_acpi_setup(LoongArchVirtMachineState *lvms);
136 void virt_fdt_setup(LoongArchVirtMachineState *lvms);
137
138 static inline bool virt_has_dmsi(LoongArchVirtMachineState *lvms)
139 {
140 if (!(lvms->misc_feature & BIT(IOCSRF_DMSI))) {
141 return false;
142 }
143
144 return true;
145 }
146
147 static inline bool virt_is_veiointc_enabled(LoongArchVirtMachineState *lvms)
148 {
149 if (lvms->veiointc == ON_OFF_AUTO_OFF) {
150 return false;
151 }
152 return true;
153 }
154
155 #endif