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1 /*
2 * Allwinner SRAM controller emulation
3 *
4 * Copyright (C) 2023 qianfan Zhao <qianfanguijin@163.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20 #ifndef HW_MISC_ALLWINNER_SRAMC_H
21 #define HW_MISC_ALLWINNER_SRAMC_H
22
23 #include "qom/object.h"
24 #include "hw/core/sysbus.h"
25 #include "qemu/uuid.h"
26
27 /**
28 * Object model
29 * @{
30 */
31 #define TYPE_AW_SRAMC "allwinner-sramc"
32 #define TYPE_AW_SRAMC_SUN8I_R40 TYPE_AW_SRAMC "-sun8i-r40"
33 OBJECT_DECLARE_TYPE(AwSRAMCState, AwSRAMCClass, AW_SRAMC)
34
35 /** @} */
36
37 /**
38 * Allwinner SRAMC object instance state
39 */
40 struct AwSRAMCState {
41 /*< private >*/
42 SysBusDevice parent_obj;
43 /*< public >*/
44
45 /** Maps I/O registers in physical memory */
46 MemoryRegion iomem;
47
48 /* registers */
49 uint32_t sram_ctl1;
50 uint32_t sram_ver;
51 uint32_t sram_soft_entry_reg0;
52 };
53
54 /**
55 * Allwinner SRAM Controller class-level struct.
56 *
57 * This struct is filled by each sunxi device specific code
58 * such that the generic code can use this struct to support
59 * all devices.
60 */
61 struct AwSRAMCClass {
62 /*< private >*/
63 SysBusDeviceClass parent_class;
64 /*< public >*/
65
66 uint32_t sram_version_code;
67 };
68
69 #endif /* HW_MISC_ALLWINNER_SRAMC_H */