| 1 | /* |
| 2 | * Copyright (c) 2017, Impinj, Inc. |
| 3 | * |
| 4 | * i.MX7 SNVS block emulation code |
| 5 | * |
| 6 | * Author: Andrey Smirnov <andrew.smirnov@gmail.com> |
| 7 | * |
| 8 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 9 | * See the COPYING file in the top-level directory. |
| 10 | */ |
| 11 | |
| 12 | #ifndef IMX7_SNVS_H |
| 13 | #define IMX7_SNVS_H |
| 14 | |
| 15 | #include "qemu/bitops.h" |
| 16 | #include "hw/core/sysbus.h" |
| 17 | #include "qom/object.h" |
| 18 | |
| 19 | |
| 20 | enum IMX7SNVSRegisters { |
| 21 | SNVS_LPCR = 0x38, |
| 22 | SNVS_LPCR_TOP = BIT(6), |
| 23 | SNVS_LPCR_DP_EN = BIT(5), |
| 24 | SNVS_LPSRTCMR = 0x050, /* Secure Real Time Counter MSB Register */ |
| 25 | SNVS_LPSRTCLR = 0x054, /* Secure Real Time Counter LSB Register */ |
| 26 | }; |
| 27 | |
| 28 | #define TYPE_IMX7_SNVS "imx7.snvs" |
| 29 | OBJECT_DECLARE_SIMPLE_TYPE(IMX7SNVSState, IMX7_SNVS) |
| 30 | |
| 31 | struct IMX7SNVSState { |
| 32 | /* <private> */ |
| 33 | SysBusDevice parent_obj; |
| 34 | |
| 35 | MemoryRegion mmio; |
| 36 | |
| 37 | uint64_t tick_offset; |
| 38 | uint64_t lpcr; |
| 39 | }; |
| 40 | |
| 41 | #endif /* IMX7_SNVS_H */ |