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1 /*
2 * Copyright (c) 2025 Bernhard Beschow <shentey@gmail.com>
3 *
4 * i.MX8MP ANALOG IP block emulation code
5 *
6 * SPDX-License-Identifier: GPL-2.0-or-later
7 */
8
9 #ifndef IMX8MP_ANALOG_H
10 #define IMX8MP_ANALOG_H
11
12 #include "qom/object.h"
13 #include "hw/core/sysbus.h"
14
15 enum IMX8MPAnalogRegisters {
16 ANALOG_AUDIO_PLL1_GEN_CTRL = 0x000 / 4,
17 ANALOG_AUDIO_PLL1_FDIV_CTL0 = 0x004 / 4,
18 ANALOG_AUDIO_PLL1_FDIV_CTL1 = 0x008 / 4,
19 ANALOG_AUDIO_PLL1_SSCG_CTRL = 0x00c / 4,
20 ANALOG_AUDIO_PLL1_MNIT_CTRL = 0x010 / 4,
21 ANALOG_AUDIO_PLL2_GEN_CTRL = 0x014 / 4,
22 ANALOG_AUDIO_PLL2_FDIV_CTL0 = 0x018 / 4,
23 ANALOG_AUDIO_PLL2_FDIV_CTL1 = 0x01c / 4,
24 ANALOG_AUDIO_PLL2_SSCG_CTRL = 0x020 / 4,
25 ANALOG_AUDIO_PLL2_MNIT_CTRL = 0x024 / 4,
26 ANALOG_VIDEO_PLL1_GEN_CTRL = 0x028 / 4,
27 ANALOG_VIDEO_PLL1_FDIV_CTL0 = 0x02c / 4,
28 ANALOG_VIDEO_PLL1_FDIV_CTL1 = 0x030 / 4,
29 ANALOG_VIDEO_PLL1_SSCG_CTRL = 0x034 / 4,
30 ANALOG_VIDEO_PLL1_MNIT_CTRL = 0x038 / 4,
31 ANALOG_DRAM_PLL_GEN_CTRL = 0x050 / 4,
32 ANALOG_DRAM_PLL_FDIV_CTL0 = 0x054 / 4,
33 ANALOG_DRAM_PLL_FDIV_CTL1 = 0x058 / 4,
34 ANALOG_DRAM_PLL_SSCG_CTRL = 0x05c / 4,
35 ANALOG_DRAM_PLL_MNIT_CTRL = 0x060 / 4,
36 ANALOG_GPU_PLL_GEN_CTRL = 0x064 / 4,
37 ANALOG_GPU_PLL_FDIV_CTL0 = 0x068 / 4,
38 ANALOG_GPU_PLL_LOCKD_CTRL = 0x06c / 4,
39 ANALOG_GPU_PLL_MNIT_CTRL = 0x070 / 4,
40 ANALOG_VPU_PLL_GEN_CTRL = 0x074 / 4,
41 ANALOG_VPU_PLL_FDIV_CTL0 = 0x078 / 4,
42 ANALOG_VPU_PLL_LOCKD_CTRL = 0x07c / 4,
43 ANALOG_VPU_PLL_MNIT_CTRL = 0x080 / 4,
44 ANALOG_ARM_PLL_GEN_CTRL = 0x084 / 4,
45 ANALOG_ARM_PLL_FDIV_CTL0 = 0x088 / 4,
46 ANALOG_ARM_PLL_LOCKD_CTRL = 0x08c / 4,
47 ANALOG_ARM_PLL_MNIT_CTRL = 0x090 / 4,
48 ANALOG_SYS_PLL1_GEN_CTRL = 0x094 / 4,
49 ANALOG_SYS_PLL1_FDIV_CTL0 = 0x098 / 4,
50 ANALOG_SYS_PLL1_LOCKD_CTRL = 0x09c / 4,
51 ANALOG_SYS_PLL1_MNIT_CTRL = 0x100 / 4,
52 ANALOG_SYS_PLL2_GEN_CTRL = 0x104 / 4,
53 ANALOG_SYS_PLL2_FDIV_CTL0 = 0x108 / 4,
54 ANALOG_SYS_PLL2_LOCKD_CTRL = 0x10c / 4,
55 ANALOG_SYS_PLL2_MNIT_CTRL = 0x110 / 4,
56 ANALOG_SYS_PLL3_GEN_CTRL = 0x114 / 4,
57 ANALOG_SYS_PLL3_FDIV_CTL0 = 0x118 / 4,
58 ANALOG_SYS_PLL3_LOCKD_CTRL = 0x11c / 4,
59 ANALOG_SYS_PLL3_MNIT_CTRL = 0x120 / 4,
60 ANALOG_OSC_MISC_CFG = 0x124 / 4,
61 ANALOG_ANAMIX_PLL_MNIT_CTL = 0x128 / 4,
62
63 ANALOG_DIGPROG = 0x800 / 4,
64 ANALOG_MAX,
65 };
66
67 #define TYPE_IMX8MP_ANALOG "imx8mp.analog"
68 OBJECT_DECLARE_SIMPLE_TYPE(IMX8MPAnalogState, IMX8MP_ANALOG)
69
70 struct IMX8MPAnalogState {
71 SysBusDevice parent_obj;
72
73 struct {
74 MemoryRegion container;
75 MemoryRegion analog;
76 } mmio;
77
78 uint32_t analog[ANALOG_MAX];
79
80 /* Property for variant-specific reset values */
81 uint32_t arm_pll_fdiv_ctl0_reset;
82 };
83
84 #endif /* IMX8MP_ANALOG_H */