| 1 | /* |
| 2 | * Faraday FTGMAC100 Gigabit Ethernet |
| 3 | * |
| 4 | * Copyright (C) 2016-2017, IBM Corporation. |
| 5 | * |
| 6 | * This code is licensed under the GPL version 2 or later. See the |
| 7 | * COPYING file in the top-level directory. |
| 8 | */ |
| 9 | |
| 10 | #ifndef FTGMAC100_H |
| 11 | #define FTGMAC100_H |
| 12 | #include "qom/object.h" |
| 13 | |
| 14 | #define TYPE_FTGMAC100 "ftgmac100" |
| 15 | OBJECT_DECLARE_SIMPLE_TYPE(FTGMAC100State, FTGMAC100) |
| 16 | |
| 17 | #define FTGMAC100_MEM_SIZE 0x1000 |
| 18 | #define FTGMAC100_REG_MEM_SIZE 0x100 |
| 19 | #define FTGMAC100_REG_HIGH_MEM_SIZE 0x100 |
| 20 | #define FTGMAC100_REG_HIGH_OFFSET 0x100 |
| 21 | |
| 22 | #include "hw/core/sysbus.h" |
| 23 | #include "net/net.h" |
| 24 | |
| 25 | /* |
| 26 | * Max frame size for the receiving buffer |
| 27 | */ |
| 28 | #define FTGMAC100_MAX_FRAME_SIZE 9220 |
| 29 | |
| 30 | struct FTGMAC100State { |
| 31 | /*< private >*/ |
| 32 | SysBusDevice parent_obj; |
| 33 | |
| 34 | /*< public >*/ |
| 35 | NICState *nic; |
| 36 | NICConf conf; |
| 37 | qemu_irq irq; |
| 38 | MemoryRegion iomem_container; |
| 39 | MemoryRegion iomem; |
| 40 | MemoryRegion iomem_high; |
| 41 | |
| 42 | uint8_t frame[FTGMAC100_MAX_FRAME_SIZE]; |
| 43 | |
| 44 | uint32_t irq_state; |
| 45 | uint32_t isr; |
| 46 | uint32_t ier; |
| 47 | uint32_t rx_enabled; |
| 48 | uint32_t math[2]; |
| 49 | uint32_t rbsr; |
| 50 | uint32_t itc; |
| 51 | uint32_t aptcr; |
| 52 | uint32_t dblac; |
| 53 | uint32_t revr; |
| 54 | uint32_t fear1; |
| 55 | uint32_t tpafcr; |
| 56 | uint32_t maccr; |
| 57 | uint32_t phycr; |
| 58 | uint32_t phydata; |
| 59 | uint32_t fcr; |
| 60 | uint64_t rx_ring; |
| 61 | uint64_t rx_descriptor; |
| 62 | uint64_t tx_ring; |
| 63 | uint64_t tx_descriptor; |
| 64 | |
| 65 | uint32_t phy_status; |
| 66 | uint32_t phy_control; |
| 67 | uint32_t phy_advertise; |
| 68 | uint32_t phy_int; |
| 69 | uint32_t phy_int_mask; |
| 70 | |
| 71 | bool aspeed; |
| 72 | uint32_t txdes0_edotr; |
| 73 | uint32_t rxdes0_edorr; |
| 74 | bool dma64; |
| 75 | }; |
| 76 | |
| 77 | #define TYPE_ASPEED_MII "aspeed-mmi" |
| 78 | OBJECT_DECLARE_SIMPLE_TYPE(AspeedMiiState, ASPEED_MII) |
| 79 | |
| 80 | /* |
| 81 | * AST2600 MII controller |
| 82 | */ |
| 83 | struct AspeedMiiState { |
| 84 | /*< private >*/ |
| 85 | SysBusDevice parent_obj; |
| 86 | |
| 87 | FTGMAC100State *nic; |
| 88 | |
| 89 | MemoryRegion iomem; |
| 90 | uint32_t phycr; |
| 91 | uint32_t phydata; |
| 92 | }; |
| 93 | |
| 94 | #endif |