| 1 | /* |
| 2 | * pcie_port.h |
| 3 | * |
| 4 | * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp> |
| 5 | * VA Linux Systems Japan K.K. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along |
| 18 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
| 20 | |
| 21 | #ifndef QEMU_PCIE_PORT_H |
| 22 | #define QEMU_PCIE_PORT_H |
| 23 | |
| 24 | #include "hw/pci/pci_bridge.h" |
| 25 | #include "hw/pci/pci_bus.h" |
| 26 | #include "hw/pci/pci_device.h" |
| 27 | #include "qom/object.h" |
| 28 | |
| 29 | #define TYPE_PCIE_PORT "pcie-port" |
| 30 | OBJECT_DECLARE_SIMPLE_TYPE(PCIEPort, PCIE_PORT) |
| 31 | |
| 32 | struct PCIEPort { |
| 33 | /*< private >*/ |
| 34 | PCIBridge parent_obj; |
| 35 | /*< public >*/ |
| 36 | |
| 37 | /* pci express switch port */ |
| 38 | uint8_t port; |
| 39 | }; |
| 40 | |
| 41 | void pcie_port_init_reg(PCIDevice *d); |
| 42 | |
| 43 | PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn); |
| 44 | PCIDevice *pcie_find_port_first(PCIBus *bus); |
| 45 | int pcie_count_ds_ports(PCIBus *bus); |
| 46 | |
| 47 | #define TYPE_PCIE_SLOT "pcie-slot" |
| 48 | OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT) |
| 49 | |
| 50 | struct PCIESlot { |
| 51 | /*< private >*/ |
| 52 | PCIEPort parent_obj; |
| 53 | /*< public >*/ |
| 54 | |
| 55 | /* pci express switch port with slot */ |
| 56 | uint8_t chassis; |
| 57 | uint16_t slot; |
| 58 | |
| 59 | PCIExpLinkSpeed speed; |
| 60 | PCIExpLinkWidth width; |
| 61 | bool flitmode; |
| 62 | |
| 63 | /* Indicates whether any type of hot-plug is allowed on the slot */ |
| 64 | bool hotplug; |
| 65 | |
| 66 | /* broken ACPI hotplug compat knob to preserve 6.1 ABI intact */ |
| 67 | bool hide_native_hotplug_cap; |
| 68 | |
| 69 | QLIST_ENTRY(PCIESlot) next; |
| 70 | }; |
| 71 | |
| 72 | void pcie_chassis_create(uint8_t chassis_number); |
| 73 | int pcie_chassis_add_slot(struct PCIESlot *slot); |
| 74 | void pcie_chassis_del_slot(PCIESlot *s); |
| 75 | |
| 76 | #define TYPE_PCIE_ROOT_PORT "pcie-root-port-base" |
| 77 | typedef struct PCIERootPortClass PCIERootPortClass; |
| 78 | DECLARE_CLASS_CHECKERS(PCIERootPortClass, PCIE_ROOT_PORT, |
| 79 | TYPE_PCIE_ROOT_PORT) |
| 80 | |
| 81 | struct PCIERootPortClass { |
| 82 | PCIDeviceClass parent_class; |
| 83 | DeviceRealize parent_realize; |
| 84 | ResettablePhases parent_phases; |
| 85 | |
| 86 | uint8_t (*aer_vector)(const PCIDevice *dev); |
| 87 | int (*interrupts_init)(PCIDevice *dev, Error **errp); |
| 88 | void (*interrupts_uninit)(PCIDevice *dev); |
| 89 | |
| 90 | int exp_offset; |
| 91 | int aer_offset; |
| 92 | int ssvid_offset; |
| 93 | int acs_offset; /* If nonzero, optional ACS capability offset */ |
| 94 | int ssid; |
| 95 | }; |
| 96 | |
| 97 | #endif /* QEMU_PCIE_PORT_H */ |